Disable write buffering on Toshiba ToPIC95

Disable write buffering on the Toshiba ToPIC95 if it is enabled by
somebody (it is not supposed to be a power-on default according to
the datasheet). On the ToPIC95, practically no 32-bit Cardbus card
will work under heavy load without locking up the whole system if
this is left enabled. I tried about a dozen. It does not affect
16-bit cards. This is similar to the O2 bugs in early controller
revisions it seems.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=55961
Cc: <stable@vger.kernel.org>
Signed-off-by: Ryan C. Underwood <nemesis@icequake.net>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>

diff --git a/drivers/pcmcia/topic.h b/drivers/pcmcia/topic.h
index 615a45a8fe8674fe4d920d87884bde653f2e3b3a..582688fe75054003e9f2c0927758b162e7dd6f3a 100644 (file)
--- a/drivers/pcmcia/topic.h
+++ b/drivers/pcmcia/topic.h
@@ -104,6 +104,9 @@
 #define TOPIC_EXCA_IF_CONTROL          0x3e    /* 8 bit */
 #define TOPIC_EXCA_IFC_33V_ENA         0x01
 
+#define TOPIC_PCI_CFG_PPBCN            0x3e    /* 16-bit */
+#define TOPIC_PCI_CFG_PPBCN_WBEN       0x0400
+
 static void topic97_zoom_video(struct pcmcia_socket *sock, int onoff)
 {
        struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
@@ -138,6 +141,7 @@ static int topic97_override(struct yenta_socket *socket)
 static int topic95_override(struct yenta_socket *socket)
 {
        u8 fctrl;
+       u16 ppbcn;
 
        /* enable 3.3V support for 16bit cards */
        fctrl = exca_readb(socket, TOPIC_EXCA_IF_CONTROL);
@@ -146,6 +150,18 @@ static int topic95_override(struct yenta_socket *socket)
        /* tell yenta to use exca registers to power 16bit cards */
        socket->flags |= YENTA_16BIT_POWER_EXCA | YENTA_16BIT_POWER_DF;
 
+       /* Disable write buffers to prevent lockups under load with numerous
+          Cardbus cards, observed on Tecra 500CDT and reported elsewhere on the
+          net.  This is not a power-on default according to the datasheet
+          but some BIOSes seem to set it. */
+       if (pci_read_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, &ppbcn) == 0
+           && socket->dev->revision <= 7
+           && (ppbcn & TOPIC_PCI_CFG_PPBCN_WBEN)) {
+               ppbcn &= ~TOPIC_PCI_CFG_PPBCN_WBEN;
+               pci_write_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, ppbcn);
+               dev_info(&socket->dev->dev, "Disabled ToPIC95 Cardbus write buffers.\n");
+       }
+
        return 0;
 }