ASoC: Intel: Skylake: Update DSP stall bits
authorJayachandran B <jayachandran.b@intel.com>
Mon, 13 Jun 2016 12:29:03 +0000 (17:59 +0530)
committerMark Brown <broonie@kernel.org>
Tue, 14 Jun 2016 13:59:33 +0000 (14:59 +0100)
The stall bits needs to comprehend the number of DSP cores
running, so update the stall and unstall register writes to
comprehend SKL_DSP_CORES_MASK values as well.

Signed-off-by: Jayachandran B <jayachandran.b@intel.com>
Signed-off-by: Ramesh Babu <ramesh.babu@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/skl-sst-dsp.c

index 37b1d24a9a9d3a6e092b6fbee9bccd6d0dbccc67..33c45aa53532c98f692978bbf2d3d6ab2bdab2f6 100644 (file)
@@ -106,9 +106,9 @@ static bool is_skl_dsp_core_enable(struct sst_dsp *ctx)
 static int skl_dsp_reset_core(struct sst_dsp *ctx)
 {
        /* stall core */
-       sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
-                        sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
-                               SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
+       sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
+                       SKL_ADSPCS_CSTALL_MASK,
+                       SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
 
        /* set reset state */
        return skl_dsp_core_set_reset_state(ctx);
@@ -127,9 +127,8 @@ int skl_dsp_start_core(struct sst_dsp *ctx)
 
        /* run core */
        dev_dbg(ctx->dev, "run core...\n");
-       sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
-                        sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
-                               ~SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
+       sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
+                       SKL_ADSPCS_CSTALL_MASK, 0);
 
        if (!is_skl_dsp_core_enable(ctx)) {
                skl_dsp_reset_core(ctx);