drm/nouveau/therm: split the nv50 and nv84 code
authorMartin Peres <martin.peres@labri.fr>
Sat, 23 Feb 2013 15:45:51 +0000 (16:45 +0100)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 26 Apr 2013 05:37:35 +0000 (15:37 +1000)
This is needed because temperature management on nv50 can be enabled and it
looks about the same as nv40.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/core/include/subdev/therm.h
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c
drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c
drivers/gpu/drm/nouveau/core/subdev/therm/nv50.c
drivers/gpu/drm/nouveau/core/subdev/therm/nv84.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/therm/nva3.c
drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c
drivers/gpu/drm/nouveau/core/subdev/therm/priv.h

index 90f9140eeefd70adae09b70158f718562cd153ba..0c65479c1b6f802b3c927beb28db071e5a60a4b8 100644 (file)
@@ -126,6 +126,7 @@ nouveau-y += core/subdev/therm/ic.o
 nouveau-y += core/subdev/therm/temp.o
 nouveau-y += core/subdev/therm/nv40.o
 nouveau-y += core/subdev/therm/nv50.o
+nouveau-y += core/subdev/therm/nv84.o
 nouveau-y += core/subdev/therm/nva3.o
 nouveau-y += core/subdev/therm/nvd0.o
 nouveau-y += core/subdev/timer/base.o
index 0b20fc0d19c16861f969f5acdda2938559243be1..c075998d82e6605272fd40a6be1d3e1e1d221b8f 100644 (file)
@@ -73,6 +73,7 @@ int  _nouveau_therm_fini(struct nouveau_object *, bool);
 
 extern struct nouveau_oclass nv40_therm_oclass;
 extern struct nouveau_oclass nv50_therm_oclass;
+extern struct nouveau_oclass nv84_therm_oclass;
 extern struct nouveau_oclass nva3_therm_oclass;
 extern struct nouveau_oclass nvd0_therm_oclass;
 
index 5ed2fa51ddc2aea82062e1ede5bddd48efc65e06..04b2d75f464388fffda0c791bf8ca8d509343db7 100644 (file)
@@ -83,7 +83,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
@@ -109,7 +109,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
@@ -135,7 +135,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
@@ -161,7 +161,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
@@ -187,7 +187,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
@@ -213,7 +213,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
@@ -239,7 +239,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv50_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
@@ -265,7 +265,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
@@ -291,7 +291,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
+               device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
index a70d1b7e397b4b3ffe280b1f0ad6152679f6f15b..002e51b3af9358aa64880868ee6abe2493adfafd 100644 (file)
@@ -165,7 +165,7 @@ nv40_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty)
        return 0;
 }
 
-static void
+void
 nv40_therm_intr(struct nouveau_subdev *subdev)
 {
        struct nouveau_therm *therm = nouveau_therm(subdev);
index 86632cbd65cea4ccabff257c19838f0f82efb931..37da24a5418b4fb1d136b4ecbbb95fd0323ed8e0 100644 (file)
@@ -124,141 +124,6 @@ nv50_temp_get(struct nouveau_therm *therm)
        return nv_rd32(therm, 0x20400);
 }
 
-static void
-nv50_therm_program_alarms(struct nouveau_therm *therm)
-{
-       struct nouveau_therm_priv *priv = (void *)therm;
-       struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
-       unsigned long flags;
-
-       spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
-
-       /* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
-       nv_wr32(therm, 0x20000, 0x000003ff);
-
-       /* shutdown: The computer should be shutdown when reached */
-       nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis);
-       nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp);
-
-       /* THRS_1 : fan boost*/
-       nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp);
-
-       /* THRS_2 : critical */
-       nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp);
-
-       /* THRS_4 : down clock */
-       nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);
-       spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
-
-       nv_info(therm,
-               "Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
-               sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis,
-               sensor->thrs_down_clock.temp,
-               sensor->thrs_down_clock.hysteresis,
-               sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis,
-               sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis);
-
-}
-
-/* must be called with alarm_program_lock taken ! */
-static void
-nv50_therm_threshold_hyst_emulation(struct nouveau_therm *therm,
-                                  uint32_t thrs_reg, u8 status_bit,
-                                  const struct nvbios_therm_threshold *thrs,
-                                  enum nouveau_therm_thrs thrs_name)
-{
-       enum nouveau_therm_thrs_direction direction;
-       enum nouveau_therm_thrs_state prev_state, new_state;
-       int temp, cur;
-
-       prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name);
-       temp = nv_rd32(therm, thrs_reg);
-
-       /* program the next threshold */
-       if (temp == thrs->temp) {
-               nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis);
-               new_state = NOUVEAU_THERM_THRS_HIGHER;
-       } else {
-               nv_wr32(therm, thrs_reg, thrs->temp);
-               new_state = NOUVEAU_THERM_THRS_LOWER;
-       }
-
-       /* fix the state (in case someone reprogrammed the alarms) */
-       cur = therm->temp_get(therm);
-       if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp)
-               new_state = NOUVEAU_THERM_THRS_HIGHER;
-       else if (new_state == NOUVEAU_THERM_THRS_HIGHER &&
-               cur < thrs->temp - thrs->hysteresis)
-               new_state = NOUVEAU_THERM_THRS_LOWER;
-       nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state);
-
-       /* find the direction */
-       if (prev_state < new_state)
-               direction = NOUVEAU_THERM_THRS_RISING;
-       else if (prev_state > new_state)
-               direction = NOUVEAU_THERM_THRS_FALLING;
-       else
-               return;
-
-       /* advertise a change in direction */
-       nouveau_therm_sensor_event(therm, thrs_name, direction);
-}
-
-static void
-nv50_therm_intr(struct nouveau_subdev *subdev)
-{
-       struct nouveau_therm *therm = nouveau_therm(subdev);
-       struct nouveau_therm_priv *priv = (void *)therm;
-       struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
-       unsigned long flags;
-       uint32_t intr;
-
-       spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
-
-       intr = nv_rd32(therm, 0x20100);
-
-       /* THRS_4: downclock */
-       if (intr & 0x002) {
-               nv50_therm_threshold_hyst_emulation(therm, 0x20414, 24,
-                                                 &sensor->thrs_down_clock,
-                                                 NOUVEAU_THERM_THRS_DOWNCLOCK);
-               intr &= ~0x002;
-       }
-
-       /* shutdown */
-       if (intr & 0x004) {
-               nv50_therm_threshold_hyst_emulation(therm, 0x20480, 20,
-                                                  &sensor->thrs_shutdown,
-                                                  NOUVEAU_THERM_THRS_SHUTDOWN);
-               intr &= ~0x004;
-       }
-
-       /* THRS_1 : fan boost */
-       if (intr & 0x008) {
-               nv50_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
-                                                  &sensor->thrs_fan_boost,
-                                                  NOUVEAU_THERM_THRS_FANBOOST);
-               intr &= ~0x008;
-       }
-
-       /* THRS_2 : critical */
-       if (intr & 0x010) {
-               nv50_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
-                                                  &sensor->thrs_critical,
-                                                  NOUVEAU_THERM_THRS_CRITICAL);
-               intr &= ~0x010;
-       }
-
-       if (intr)
-               nv_error(therm, "unhandled intr 0x%08x\n", intr);
-
-       /* ACK everything */
-       nv_wr32(therm, 0x20100, 0xffffffff);
-       nv_wr32(therm, 0x1100, 0x10000); /* PBUS */
-
-       spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
-}
-
 static int
 nv50_therm_ctor(struct nouveau_object *parent,
                struct nouveau_object *engine,
@@ -278,22 +143,8 @@ nv50_therm_ctor(struct nouveau_object *parent,
        priv->base.base.pwm_set = nv50_fan_pwm_set;
        priv->base.base.pwm_clock = nv50_fan_pwm_clock;
        priv->base.base.temp_get = nv50_temp_get;
-       priv->base.sensor.program_alarms = nv50_therm_program_alarms;
-       nv_subdev(priv)->intr = nv50_therm_intr;
-
-       /* init the thresholds */
-       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
-                                                NOUVEAU_THERM_THRS_SHUTDOWN,
-                                                NOUVEAU_THERM_THRS_LOWER);
-       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
-                                                NOUVEAU_THERM_THRS_FANBOOST,
-                                                NOUVEAU_THERM_THRS_LOWER);
-       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
-                                                NOUVEAU_THERM_THRS_CRITICAL,
-                                                NOUVEAU_THERM_THRS_LOWER);
-       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
-                                                NOUVEAU_THERM_THRS_DOWNCLOCK,
-                                                NOUVEAU_THERM_THRS_LOWER);
+       priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
+       nv_subdev(priv)->intr = nv40_therm_intr;
 
        return nouveau_therm_preinit(&priv->base.base);
 }
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nv84.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nv84.c
new file mode 100644 (file)
index 0000000..be486ce
--- /dev/null
@@ -0,0 +1,221 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ *         Martin Peres
+ */
+
+#include "priv.h"
+
+struct nv84_therm_priv {
+       struct nouveau_therm_priv base;
+};
+
+int
+nv84_temp_get(struct nouveau_therm *therm)
+{
+       return nv_rd32(therm, 0x20400);
+}
+
+static void
+nv84_therm_program_alarms(struct nouveau_therm *therm)
+{
+       struct nouveau_therm_priv *priv = (void *)therm;
+       struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
+       unsigned long flags;
+
+       spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
+
+       /* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
+       nv_wr32(therm, 0x20000, 0x000003ff);
+
+       /* shutdown: The computer should be shutdown when reached */
+       nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis);
+       nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp);
+
+       /* THRS_1 : fan boost*/
+       nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp);
+
+       /* THRS_2 : critical */
+       nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp);
+
+       /* THRS_4 : down clock */
+       nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);
+       spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
+
+       nv_info(therm,
+               "Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
+               sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis,
+               sensor->thrs_down_clock.temp,
+               sensor->thrs_down_clock.hysteresis,
+               sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis,
+               sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis);
+
+}
+
+/* must be called with alarm_program_lock taken ! */
+static void
+nv84_therm_threshold_hyst_emulation(struct nouveau_therm *therm,
+                                  uint32_t thrs_reg, u8 status_bit,
+                                  const struct nvbios_therm_threshold *thrs,
+                                  enum nouveau_therm_thrs thrs_name)
+{
+       enum nouveau_therm_thrs_direction direction;
+       enum nouveau_therm_thrs_state prev_state, new_state;
+       int temp, cur;
+
+       prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name);
+       temp = nv_rd32(therm, thrs_reg);
+
+       /* program the next threshold */
+       if (temp == thrs->temp) {
+               nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis);
+               new_state = NOUVEAU_THERM_THRS_HIGHER;
+       } else {
+               nv_wr32(therm, thrs_reg, thrs->temp);
+               new_state = NOUVEAU_THERM_THRS_LOWER;
+       }
+
+       /* fix the state (in case someone reprogrammed the alarms) */
+       cur = therm->temp_get(therm);
+       if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp)
+               new_state = NOUVEAU_THERM_THRS_HIGHER;
+       else if (new_state == NOUVEAU_THERM_THRS_HIGHER &&
+               cur < thrs->temp - thrs->hysteresis)
+               new_state = NOUVEAU_THERM_THRS_LOWER;
+       nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state);
+
+       /* find the direction */
+       if (prev_state < new_state)
+               direction = NOUVEAU_THERM_THRS_RISING;
+       else if (prev_state > new_state)
+               direction = NOUVEAU_THERM_THRS_FALLING;
+       else
+               return;
+
+       /* advertise a change in direction */
+       nouveau_therm_sensor_event(therm, thrs_name, direction);
+}
+
+static void
+nv84_therm_intr(struct nouveau_subdev *subdev)
+{
+       struct nouveau_therm *therm = nouveau_therm(subdev);
+       struct nouveau_therm_priv *priv = (void *)therm;
+       struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
+       unsigned long flags;
+       uint32_t intr;
+
+       spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
+
+       intr = nv_rd32(therm, 0x20100);
+
+       /* THRS_4: downclock */
+       if (intr & 0x002) {
+               nv84_therm_threshold_hyst_emulation(therm, 0x20414, 24,
+                                                 &sensor->thrs_down_clock,
+                                                 NOUVEAU_THERM_THRS_DOWNCLOCK);
+               intr &= ~0x002;
+       }
+
+       /* shutdown */
+       if (intr & 0x004) {
+               nv84_therm_threshold_hyst_emulation(therm, 0x20480, 20,
+                                                  &sensor->thrs_shutdown,
+                                                  NOUVEAU_THERM_THRS_SHUTDOWN);
+               intr &= ~0x004;
+       }
+
+       /* THRS_1 : fan boost */
+       if (intr & 0x008) {
+               nv84_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
+                                                  &sensor->thrs_fan_boost,
+                                                  NOUVEAU_THERM_THRS_FANBOOST);
+               intr &= ~0x008;
+       }
+
+       /* THRS_2 : critical */
+       if (intr & 0x010) {
+               nv84_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
+                                                  &sensor->thrs_critical,
+                                                  NOUVEAU_THERM_THRS_CRITICAL);
+               intr &= ~0x010;
+       }
+
+       if (intr)
+               nv_error(therm, "unhandled intr 0x%08x\n", intr);
+
+       /* ACK everything */
+       nv_wr32(therm, 0x20100, 0xffffffff);
+       nv_wr32(therm, 0x1100, 0x10000); /* PBUS */
+
+       spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
+}
+
+static int
+nv84_therm_ctor(struct nouveau_object *parent,
+               struct nouveau_object *engine,
+               struct nouveau_oclass *oclass, void *data, u32 size,
+               struct nouveau_object **pobject)
+{
+       struct nv84_therm_priv *priv;
+       int ret;
+
+       ret = nouveau_therm_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl;
+       priv->base.base.pwm_get = nv50_fan_pwm_get;
+       priv->base.base.pwm_set = nv50_fan_pwm_set;
+       priv->base.base.pwm_clock = nv50_fan_pwm_clock;
+       priv->base.base.temp_get = nv84_temp_get;
+       priv->base.sensor.program_alarms = nv84_therm_program_alarms;
+       nv_subdev(priv)->intr = nv84_therm_intr;
+
+       /* init the thresholds */
+       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
+                                                NOUVEAU_THERM_THRS_SHUTDOWN,
+                                                NOUVEAU_THERM_THRS_LOWER);
+       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
+                                                NOUVEAU_THERM_THRS_FANBOOST,
+                                                NOUVEAU_THERM_THRS_LOWER);
+       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
+                                                NOUVEAU_THERM_THRS_CRITICAL,
+                                                NOUVEAU_THERM_THRS_LOWER);
+       nouveau_therm_sensor_set_threshold_state(&priv->base.base,
+                                                NOUVEAU_THERM_THRS_DOWNCLOCK,
+                                                NOUVEAU_THERM_THRS_LOWER);
+
+       return nouveau_therm_preinit(&priv->base.base);
+}
+
+struct nouveau_oclass
+nv84_therm_oclass = {
+       .handle = NV_SUBDEV(THERM, 0x84),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv84_therm_ctor,
+               .dtor = _nouveau_therm_dtor,
+               .init = _nouveau_therm_init,
+               .fini = _nouveau_therm_fini,
+       },
+};
index 2dcc5437116a36bbe28b7f97175599a5ff66ef8f..d11a7c400813d9e4aba4a95e7497c1faefe21b94 100644 (file)
@@ -81,7 +81,7 @@ nva3_therm_ctor(struct nouveau_object *parent,
        priv->base.base.pwm_get = nv50_fan_pwm_get;
        priv->base.base.pwm_set = nv50_fan_pwm_set;
        priv->base.base.pwm_clock = nv50_fan_pwm_clock;
-       priv->base.base.temp_get = nv50_temp_get;
+       priv->base.base.temp_get = nv84_temp_get;
        priv->base.base.fan_sense = nva3_therm_fan_sense;
        priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
        return nouveau_therm_preinit(&priv->base.base);
index d7d30ee8332eabe82ccf7fc88eef0f02ae5ff127..54c28bdc42048d2bb9c6c2218833811c8cd8b5f5 100644 (file)
@@ -135,7 +135,7 @@ nvd0_therm_ctor(struct nouveau_object *parent,
        priv->base.base.pwm_get = nvd0_fan_pwm_get;
        priv->base.base.pwm_set = nvd0_fan_pwm_set;
        priv->base.base.pwm_clock = nvd0_fan_pwm_clock;
-       priv->base.base.temp_get = nv50_temp_get;
+       priv->base.base.temp_get = nv84_temp_get;
        priv->base.base.fan_sense = nva3_therm_fan_sense;
        priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
        return nouveau_therm_preinit(&priv->base.base);
index 438d9824b7741c5733bf2aa0f8ec306784569efe..15ca64e481f1c8aa88521ae960eab695b6c3ed7b 100644 (file)
@@ -134,11 +134,12 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm,
                                enum nouveau_therm_thrs_direction dir);
 void nouveau_therm_program_alarms_polling(struct nouveau_therm *therm);
 
+void nv40_therm_intr(struct nouveau_subdev *);
 int nv50_fan_pwm_ctrl(struct nouveau_therm *, int, bool);
 int nv50_fan_pwm_get(struct nouveau_therm *, int, u32 *, u32 *);
 int nv50_fan_pwm_set(struct nouveau_therm *, int, u32, u32);
 int nv50_fan_pwm_clock(struct nouveau_therm *);
-int nv50_temp_get(struct nouveau_therm *therm);
+int nv84_temp_get(struct nouveau_therm *therm);
 
 int nva3_therm_fan_sense(struct nouveau_therm *);