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drm/radeon: Handle PPLL0 powerdown on DCE8
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 5 Feb 2013 16:58:11 +0000 (11:58 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Jun 2013 20:11:43 +0000 (16:11 -0400)
Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/atombios_crtc.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 590e4eb5f074fc77749035532f06dfcc05df7cfd..24eee7c76870ed9eb1ad03f4993ba6a77d5594e9 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1931,7 +1931,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
                break;
        case ATOM_PPLL0:
                /* disable the ppll */
-               if (ASIC_IS_DCE61(rdev))
+               if ((rdev->family == CHIP_ARUBA) || (rdev->family == CHIP_BONAIRE))
                        atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
                                                  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
                break;