memcpy(dst, src, count * sizeof(pgd_t));
}
+ #define PTE_SHIFT ilog2(PTRS_PER_PTE)
+ static inline int page_level_shift(enum pg_level level)
+ {
+ return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
+ }
+ static inline unsigned long page_level_size(enum pg_level level)
+ {
+ return 1UL << page_level_shift(level);
+ }
+ static inline unsigned long page_level_mask(enum pg_level level)
+ {
+ return ~(page_level_size(level) - 1);
+ }
+
+/*
+ * The x86 doesn't have any external MMU info: the kernel page
+ * tables contain all the necessary information.
+ */
+static inline void update_mmu_cache(struct vm_area_struct *vma,
+ unsigned long addr, pte_t *ptep)
+{
+}
+static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
+ unsigned long addr, pmd_t *pmd)
+{
+}
+
#include <asm-generic/pgtable.h>
#endif /* __ASSEMBLY__ */