i2c: i2c-bfin-twi: Tighten condition when failing I2C transfer if MEN bit is reset...
authorSonic Zhang <sonic.zhang@analog.com>
Wed, 13 Jun 2012 08:22:43 +0000 (16:22 +0800)
committerWolfram Sang <w.sang@pengutronix.de>
Fri, 13 Jul 2012 06:36:07 +0000 (08:36 +0200)
In order to mark I2C transfer fail when MEN bit in I2C controller is
reset unexpectedly in MCOMP interrupt, interrupt status bits XMTSERV or
RCVSERV should be checked.

Master Transfer Complete (MCOMP).
[1] The initiated master transfer has completed. In the absence of a
repeat start, the bus has been released.
[0] The completion of a transfer has not been detected.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
[wsa: fixed spaces around operators and typo in commit message]

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
drivers/i2c/busses/i2c-bfin-twi.c

index 5fb5f3ee13a2a092c207601496b4f5317a64dbb6..71be486a224d475fcc4d2a4e8c34a98e08c8f467 100644 (file)
@@ -201,7 +201,8 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
                return;
        }
        if (twi_int_status & MCOMP) {
-               if ((read_MASTER_CTL(iface) & MEN) == 0 &&
+               if (twi_int_status & (XMTSERV | RCVSERV) &&
+                       (read_MASTER_CTL(iface) & MEN) == 0 &&
                        (iface->cur_mode == TWI_I2C_MODE_REPEAT ||
                        iface->cur_mode == TWI_I2C_MODE_COMBINED)) {
                        iface->result = -1;