drm/amdgpu: add get_clockgating for sdma v4

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 45c79f8950aaca4f0c3e98f0d5ca49745986de87..46d45cb69070abfac79c843fa718088940a3481b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1408,6 +1408,25 @@ static int sdma_v4_0_set_powergating_state(void *handle,
        return 0;
 }
 
+static void sdma_v4_0_get_clockgating_state(void *handle, u32 *flags)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       int data;
+
+       if (amdgpu_sriov_vf(adev))
+               *flags = 0;
+
+       /* AMD_CG_SUPPORT_SDMA_MGCG */
+       data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL));
+       if (!(data & SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK))
+               *flags |= AMD_CG_SUPPORT_SDMA_MGCG;
+
+       /* AMD_CG_SUPPORT_SDMA_LS */
+       data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL));
+       if (data & SDMA0_POWER_CNTL__MEM_POWER_OVERRIDE_MASK)
+               *flags |= AMD_CG_SUPPORT_SDMA_LS;
+}
+
 const struct amd_ip_funcs sdma_v4_0_ip_funcs = {
        .name = "sdma_v4_0",
        .early_init = sdma_v4_0_early_init,
@@ -1423,6 +1442,7 @@ const struct amd_ip_funcs sdma_v4_0_ip_funcs = {
        .soft_reset = sdma_v4_0_soft_reset,
        .set_clockgating_state = sdma_v4_0_set_clockgating_state,
        .set_powergating_state = sdma_v4_0_set_powergating_state,
+       .get_clockgating_state = sdma_v4_0_get_clockgating_state,
 };
 
 static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = {