ARM: dt: tegra: consistent basic property ordering
authorStephen Warren <swarren@nvidia.com>
Fri, 11 May 2012 23:12:52 +0000 (17:12 -0600)
committerStephen Warren <swarren@nvidia.com>
Mon, 14 May 2012 16:55:19 +0000 (10:55 -0600)
Put properties in order compatible, reg, interrupts, then anything else
the node has.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/tegra-paz00.dts
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index b500212cc01c12d1f3e929fe171e7f3f2f4e8ed3..6539e893480236074005bc5af9f646c96977168b 100644 (file)
        };
 
        nvec {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,nvec";
                reg = <0x7000c500 0x100>;
                interrupts = <0 92 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                clock-frequency = <80000>;
                request-gpios = <&gpio 170 0>; /* gpio PV2 */
                slave-addr = <138>;
index 0e371f92d1d260624411ee4518504a11a1833202..df34defe1bbd7761a506d46eccc7860506fdb5c1 100644 (file)
@@ -6,10 +6,10 @@
 
        intc: interrupt-controller {
                compatible = "arm,cortex-a9-gic";
-               interrupt-controller;
-               #interrupt-cells = <3>;
                reg = <0x50041000 0x1000
                       0x50040100 0x0100>;
+               interrupt-controller;
+               #interrupt-cells = <3>;
        };
 
        apbdma: dma {
        };
 
        i2c@7000c000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000c000 0x100>;
                interrupts = <0 38 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000c400 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000c400 0x100>;
                interrupts = <0 84 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000c500 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000c500 0x100>;
                interrupts = <0 92 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000d000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c-dvc";
                reg = <0x7000d000 0x200>;
                interrupts = <0 53 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        pmc {
        };
 
        emc {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-emc";
                reg = <0x7000f400 0x200>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        usb@c5000000 {
index 9fb47adc935d748c1c7cb5398675f22ae0d89fca..5a1c85fbf0f029b545eb653eb9681ea998eac906 100644 (file)
@@ -6,10 +6,10 @@
 
        intc: interrupt-controller {
                compatible = "arm,cortex-a9-gic";
-               interrupt-controller;
-               #interrupt-cells = <3>;
                reg = <0x50041000 0x1000
                       0x50040100 0x0100>;
+               interrupt-controller;
+               #interrupt-cells = <3>;
        };
 
        apbdma: dma {
        };
 
        i2c@7000c000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
                reg = <0x7000c000 0x100>;
                interrupts = <0 38 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000c400 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
                reg = <0x7000c400 0x100>;
                interrupts = <0 84 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000c500 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
                reg = <0x7000c500 0x100>;
                interrupts = <0 92 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000c700 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
                reg = <0x7000c700 0x100>;
                interrupts = <0 120 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        i2c@7000d000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
                reg = <0x7000d000 0x100>;
                interrupts = <0 53 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
        pmc {