ath9k: use REG_RMW and rmw buffer in ath9k_hw_4k_set_gain
authorOleksij Rempel <linux@rempel-privat.de>
Sun, 22 Mar 2015 18:30:01 +0000 (19:30 +0100)
committerKalle Valo <kvalo@codeaurora.org>
Mon, 30 Mar 2015 08:31:39 +0000 (11:31 +0300)
it is possible to reduce time needed for this function
by rplacing REG_WRITE with REG_RMW (plus dummy 0) and putt all commands
in same buffer.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/eeprom_4k.c

index 291c1d14403ce4bed2679d9694445d95d9fc4e91..38dc965605d8912fda3ed8c53c7bc033e15d1de5 100644 (file)
@@ -772,15 +772,14 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
                                 struct ar5416_eeprom_4k *eep,
                                 u8 txRxAttenLocal)
 {
-       REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0,
-                 pModal->antCtrlChain[0]);
+       ENABLE_REG_RMW_BUFFER(ah);
+       REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
+               pModal->antCtrlChain[0], 0);
 
-       REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0),
-                 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
-                  ~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF |
-                    AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) |
-                 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
-                 SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
+       REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
+               SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
+               SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF),
+               AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF);
 
        if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
            AR5416_EEP_MINOR_VER_3) {
@@ -819,6 +818,7 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
                      AR9280_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
        REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
                      AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]);
+       REG_RMW_BUFFER_FLUSH(ah);
 }
 
 /*