drm/i915: Always use cpp==4 for FW_BLC_SELF on 915GM/945GM

Bspec says:
"FW_BLC_SELF
 ...
 Programming Note [DevALV] and [DevCST]: When calculating watermark
 values for 15/16bpp, assume 32bpp for purposes of calculation using
 the high priority bandwidth analysis spreadsheet."

Let's do that.

Perhaps this might even help with the problem that resulted in
commit 2ab1bc9df01d ("drm/i915: Disable self-refresh for untiled fbs on i915gm")

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1469804222-12650-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b5513d3a2df83f4f1e420fabf6d5ce1594e6fc67..e2eee775da46cc803334cd6e5bc473b4a0d79937 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1604,6 +1604,9 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
                unsigned long line_time_us;
                int entries;
 
+               if (IS_I915GM(dev) || IS_I945GM(dev))
+                       cpp = 4;
+
                line_time_us = max(htotal * 1000 / clock, 1);
 
                /* Use ns/us then divide to preserve precision */