/*
* Populate the standardized counter setup bit fields.
- * Note: IndexSrc is restricted to ENC_X or IndxPol.
*/
setup =
/* LoadSrc = LoadSrcA. */
S626_SET_STD_LATCHSRC(S626_GET_CRB_LATCHSRC(crb)) |
/* IntSrc = IntSrcA. */
S626_SET_STD_INTSRC(S626_GET_CRA_INTSRC_A(cra)) |
- /* IndxSrc = IndxSrcA<1>. */
- S626_SET_STD_INDXSRC(S626_GET_CRA_INDXSRC_A(cra) >> 1) |
+ /* IndxSrc = IndxSrcA. */
+ S626_SET_STD_INDXSRC(S626_GET_CRA_INDXSRC_A(cra)) |
/* IndxPol = IndxPolA. */
S626_SET_STD_INDXPOL(S626_GET_CRA_INDXPOL_A(cra)) |
/* ClkEnab = ClkEnabA. */
/*
* Populate the standardized counter setup bit fields.
- * Note: IndexSrc is restricted to ENC_X or IndxPol.
*/
setup =
/* IntSrc = IntSrcB. */
S626_SET_STD_INDXPOL(S626_GET_CRB_INDXPOL_B(crb)) |
/* ClkEnab = ClkEnabB. */
S626_SET_STD_CLKENAB(S626_GET_CRB_CLKENAB_B(crb)) |
- /* IndxSrc = IndxSrcB<1>. */
- S626_SET_STD_INDXSRC(S626_GET_CRA_INDXSRC_B(cra) >> 1);
+ /* IndxSrc = IndxSrcB. */
+ S626_SET_STD_INDXSRC(S626_GET_CRA_INDXSRC_B(cra));
/* Adjust mode-dependent parameters. */
cntsrc = S626_GET_CRA_CNTSRC_B(cra);
/* Initialize CRA and CRB images. */
/* Preload trigger is passed through. */
cra = S626_SET_CRA_LOADSRC_A(S626_GET_STD_LOADSRC(setup));
- /* IndexSrc is restricted to ENC_X or IndxPol. */
- cra |= S626_SET_CRA_INDXSRC_A(S626_GET_STD_INDXSRC(setup) << 1);
+ /* IndexSrc is passed through. */
+ cra |= S626_SET_CRA_INDXSRC_A(S626_GET_STD_INDXSRC(setup));
/* Reset any pending CounterA event captures. */
crb = S626_SET_CRB_INTRESETCMD(1) | S626_SET_CRB_INTRESET_A(1);
* Force positive index polarity if IndxSrc is software-driven only,
* otherwise pass it through.
*/
- if (S626_GET_STD_INDXSRC(setup) == S626_INDXSRC_HARD)
+ if (S626_GET_STD_INDXSRC(setup) != S626_INDXSRC_SOFT)
cra |= S626_SET_CRA_INDXPOL_A(S626_GET_STD_INDXPOL(setup));
/*
unsigned cntsrc, clkmult, clkpol;
/* Initialize CRA and CRB images. */
- /* IndexSrc field is restricted to ENC_X or IndxPol. */
- cra = S626_SET_CRA_INDXSRC_B(S626_GET_STD_INDXSRC(setup) << 1);
+ /* IndexSrc is passed through. */
+ cra = S626_SET_CRA_INDXSRC_B(S626_GET_STD_INDXSRC(setup));
/* Reset event captures and disable interrupts. */
crb = S626_SET_CRB_INTRESETCMD(1) | S626_SET_CRB_INTRESET_B(1);
* Force positive index polarity if IndxSrc is software-driven only,
* otherwise pass it through.
*/
- if (S626_GET_STD_INDXSRC(setup) == S626_INDXSRC_HARD)
+ if (S626_GET_STD_INDXSRC(setup) != S626_INDXSRC_SOFT)
crb |= S626_SET_CRB_INDXPOL_B(S626_GET_STD_INDXPOL(setup));
/*
#define S626_LATCHSRC_B_OVERA 3 /* Latch B on A Overflow. */
/* IndxSrc values: */
-#define S626_INDXSRC_HARD 0 /* Hardware or software index. */
-#define S626_INDXSRC_SOFT 1 /* Software index only. */
+#define S626_INDXSRC_ENCODER 0 /* Encoder. */
+#define S626_INDXSRC_DIGIN 1 /* Digital inputs. */
+#define S626_INDXSRC_SOFT 2 /* S/w controlled by IndxPol bit. */
+#define S626_INDXSRC_DISABLED 3 /* Index disabled. */
/* IndxPol values: */
#define S626_INDXPOL_POS 0 /* Index input is active high. */
#define S626_STDWID_INTSRC 2
#define S626_STDWID_LATCHSRC 2
#define S626_STDWID_LOADSRC 2
-#define S626_STDWID_INDXSRC 1
+#define S626_STDWID_INDXSRC 2
#define S626_STDWID_INDXPOL 1
#define S626_STDWID_ENCMODE 2
#define S626_STDWID_CLKPOL 1