clk: renesas: r8a7795: Add IIC-DVFS clock
authorKeita Kobayashi <keita.kobayashi.ym@renesas.com>
Mon, 23 May 2016 02:05:42 +0000 (11:05 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 27 Jan 2017 07:59:00 +0000 (08:59 +0100)
This patch adds DVFS clock for R8A7795 SoC.

Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c

index 50698a7d90745447576a4ad3afd9e0893911201b..bfffdb00df97254771b3c518a0fd824ffaf647b8 100644 (file)
@@ -221,6 +221,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
        DEF_MOD("can-if0",               916,   R8A7795_CLK_S3D4),
        DEF_MOD("i2c6",                  918,   R8A7795_CLK_S3D2),
        DEF_MOD("i2c5",                  919,   R8A7795_CLK_S3D2),
+       DEF_MOD("i2c-dvfs",              926,   R8A7795_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A7795_CLK_S3D2),
        DEF_MOD("i2c3",                  928,   R8A7795_CLK_S3D2),
        DEF_MOD("i2c2",                  929,   R8A7795_CLK_S3D2),