The current SPCR code does not check the access width of the MMIO, and
uses a default of 8bit register accesses. This prevents devices that
only do 16 or 32bit register accesses from working. By simply checking
this field and setting the MMIO string appropriately, this issue can be
corrected. To prevent any legacy issues, the code will default to 8bit
accesses if the value is anything but 16 or 32.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Loc Ho <lho@apm.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
goto done;
}
- iotype = table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY ?
- "mmio" : "io";
+ if (table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+ switch (table->serial_port.access_width) {
+ default:
+ pr_err("Unexpected SPCR Access Width. Defaulting to byte size\n");
+ case ACPI_ACCESS_SIZE_BYTE:
+ iotype = "mmio";
+ break;
+ case ACPI_ACCESS_SIZE_WORD:
+ iotype = "mmio16";
+ break;
+ case ACPI_ACCESS_SIZE_DWORD:
+ iotype = "mmio32";
+ break;
+ }
+ } else
+ iotype = "io";
switch (table->interface_type) {
case ACPI_DBG2_ARM_SBSA_32BIT:
u64 address;
};
+/* Generic Address Space Access Sizes */
+#define ACPI_ACCESS_SIZE_UNDEFINED 0
+#define ACPI_ACCESS_SIZE_BYTE 1
+#define ACPI_ACCESS_SIZE_WORD 2
+#define ACPI_ACCESS_SIZE_DWORD 3
+#define ACPI_ACCESS_SIZE_QWORD 4
+
struct acpi_resource_gpio {
u8 revision_id;
u8 connection_type;