For Baytrail (Valleyview) and Braswell (Cherryview), only the HDMI codec is
in the display power well while the HD-A controller isn't. So the controller
flag 'need_i915_power' is not set to release the display power after probe,
and the codec flag 'link_power_control" is set to request/release the display
power via bus link_power ops.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
* display codec needs the power and it can be released after probe.
*/
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
- /* Assume the controller needs the power by default */
- hda->need_i915_power = 1;
+ /* Baytral/Braswell controllers don't need this power */
+ if (pci->device != 0x0f04 && pci->device != 0x2284)
+ hda->need_i915_power = 1;
+
#ifdef CONFIG_SND_HDA_I915
err = hda_i915_init(hda);
intel_haswell_fixup_enable_dp12(codec);
}
+ /* For Valleyview/Cherryview, only the display codec is in the display
+ * power well and can use link_power ops to request/release the power.
+ * For Haswell/Broadwell, the controller is also in the power well and
+ * can cover the codec power request, and so need not set this flag.
+ * For previous platforms, there is no such power well feature.
+ */
+ if (is_valleyview_plus(codec))
+ codec->core.link_power_control = 1;
+
if (is_haswell_plus(codec) || is_valleyview_plus(codec))
codec->depop_delay = 0;