drm/radeon/sumo: disable PG when changing UVD clocks
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jul 2013 19:07:28 +0000 (15:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jul 2013 21:37:30 +0000 (17:37 -0400)
Causes hangs for some people.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/sumo_dpm.c

index bf187a5b3d589ca021d1e46c79174470510da1d6..b13448f13ee8886bd4b12d8a90152065255aeea6 100644 (file)
@@ -811,6 +811,23 @@ static void sumo_program_bootup_state(struct radeon_device *rdev)
                sumo_power_level_enable(rdev, i, false);
 }
 
+static void sumo_setup_uvd_clocks(struct radeon_device *rdev,
+                                 struct radeon_ps *new_rps,
+                                 struct radeon_ps *old_rps)
+{
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+
+       if (pi->enable_gfx_power_gating) {
+               sumo_gfx_powergating_enable(rdev, false);
+       }
+
+       radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
+
+       if (pi->enable_gfx_power_gating) {
+               sumo_gfx_powergating_enable(rdev, true);
+       }
+}
+
 static void sumo_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
                                                    struct radeon_ps *new_rps,
                                                    struct radeon_ps *old_rps)
@@ -826,7 +843,7 @@ static void sumo_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
            current_ps->levels[current_ps->num_levels - 1].sclk)
                return;
 
-       radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
+       sumo_setup_uvd_clocks(rdev, new_rps, old_rps);
 }
 
 static void sumo_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
@@ -844,7 +861,7 @@ static void sumo_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
            current_ps->levels[current_ps->num_levels - 1].sclk)
                return;
 
-       radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
+       sumo_setup_uvd_clocks(rdev, new_rps, old_rps);
 }
 
 void sumo_take_smu_control(struct radeon_device *rdev, bool enable)