ARM: realview: remove private barrier implementation
authorArnd Bergmann <arnd@arndb.de>
Wed, 25 Nov 2015 16:32:18 +0000 (17:32 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 15 Dec 2015 08:41:34 +0000 (09:41 +0100)
The realview barrier implementation tries to avoid calling outer_sync in order
to not lock up as a result of a bug in the l220 cache controller.

This gets in the way of the multiplatform support, but we can still remove
it if we make sure that the outer_sync function never gets called, by replacing
the function pointer with NULL, right after initialization.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Fixed up header inclusions]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/mach-realview/Kconfig
arch/arm/mach-realview/include/mach/barriers.h [deleted file]
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb11mp.c

index 0fe63b543f5b111445b84fa564934c479dcdd851..055e7355ec14567fd5cc7257880bf9cb6b743d05 100644 (file)
@@ -36,7 +36,6 @@ config REALVIEW_EB_A9MP
 config REALVIEW_EB_ARM11MP
        bool "Support ARM11MPCore Tile"
        depends on MACH_REALVIEW_EB
-       select ARCH_HAS_BARRIERS if SMP
        select CPU_V6K
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
@@ -57,7 +56,6 @@ config REALVIEW_EB_ARM11MP_REVB
 
 config MACH_REALVIEW_PB11MP
        bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
-       select ARCH_HAS_BARRIERS if SMP
        select ARM_GIC
        select CPU_V6K
        select HAVE_ARM_SCU if SMP
diff --git a/arch/arm/mach-realview/include/mach/barriers.h b/arch/arm/mach-realview/include/mach/barriers.h
deleted file mode 100644 (file)
index 9a73219..0000000
+++ /dev/null
@@ -1,8 +0,0 @@
-/*
- * Barriers redefined for RealView ARM11MPCore platforms with L220 cache
- * controller to work around hardware errata causing the outer_sync()
- * operation to deadlock the system.
- */
-#define mb()           dsb()
-#define rmb()          dsb()
-#define wmb()          mb()
index b3869cbbcc6858c5ddb6b8ab9808773cde4dfae6..1a2a89708fb782919eb20a7f7cc1fb99edce5bef 100644 (file)
@@ -38,6 +38,7 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/smp_twd.h>
 #include <asm/system_info.h>
+#include <asm/outercache.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -450,6 +451,12 @@ static void __init realview_eb_init(void)
                 * Bits:  .... ...0 0111 1001 0000 .... .... ....
                 */
                l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
+
+               /*
+                * due to a bug in the l220 cache controller, we must not call
+                * the sync function. stub it out here instead!
+                */
+               outer_cache.sync = NULL;
 #endif
                pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
                platform_device_register(&pmu_device);
index 15c45e25095f58963b21f8755840211e871bdefc..5bb460300b6a47c9238ed49d70e16a41892c4b82 100644 (file)
@@ -42,6 +42,7 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
+#include <asm/outercache.h>
 
 #include <mach/board-pb11mp.h>
 #include <mach/irqs.h>
@@ -345,6 +346,11 @@ static void __init realview_pb11mp_init(void)
         * Bits:  .... ...0 0111 1001 0000 .... .... ....
         */
        l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
+       /*
+        * due to a bug in the l220 cache controller, we must not call
+        * the sync function. stub it out here instead!
+        */
+       outer_cache.sync = NULL;
 #endif
 
        realview_flash_register(realview_pb11mp_flash_resource,