#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
- .ctl_reg = 0x1000,
.enable_dma = 1, /* use dma transfer with this chip*/
.bits_per_word = 16,
};
#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
- .ctl_reg = 0x1000,
.enable_dma = 0,
.bits_per_word = 16,
};
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
-/*
- * CPOL (Clock Polarity)
- * 0 - Active high SCK
- * 1 - Active low SCK
- * CPHA (Clock Phase) Selects transfer format and operation mode
- * 0 - SCLK toggles from middle of the first data bit, slave select
- * pins controlled by hardware.
- * 1 - SCLK toggles from beginning of first data bit, slave select
- * pins controller by user software.
- * .ctl_reg = 0x1c00, * CPOL=1,CPHA=1,Sandisk 1G work
- * NO NO .ctl_reg = 0x1800, * CPOL=1,CPHA=0
- * NO NO .ctl_reg = 0x1400, * CPOL=0,CPHA=1
- */
- .ctl_reg = 0x1000, /* CPOL=0,CPHA=0,Sandisk 1G work */
.enable_dma = 0, /* if 1 - block!!! */
.bits_per_word = 8,
};