drm/i915: add some more "i" in platform names for consistency
authorJani Nikula <jani.nikula@intel.com>
Wed, 30 Nov 2016 15:43:04 +0000 (17:43 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 7 Dec 2016 13:19:31 +0000 (15:19 +0200)
Consistency FTW.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/9ab811dc06570bd3fc05a917ade1bdc9bb805a75.1480520526.git.jani.nikula@intel.com
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_stolen.c
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_i2c.c
drivers/gpu/drm/i915/intel_overlay.c
drivers/gpu/drm/i915/intel_ringbuffer.c

index 00a36bf879935479d22fc0ec638fe776cc3f74ff..a746130c8e324de9cca02250a77ebcdb47bbcfd0 100644 (file)
@@ -2955,7 +2955,7 @@ static bool cursor_active(struct drm_i915_private *dev_priv, int pipe)
 {
        u32 state;
 
-       if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+       if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
                state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
        else
                state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
index e5465b330886808e14251f24b6ddc6c8f9469192..e2a99649d59457b9b652f560560c18b20de6f2b8 100644 (file)
@@ -2515,7 +2515,7 @@ intel_info(const struct drm_i915_private *dev_priv)
        (INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
 #define IS_I830(dev_priv)      (INTEL_DEVID(dev_priv) == 0x3577)
-#define IS_845G(dev_priv)      (INTEL_DEVID(dev_priv) == 0x2562)
+#define IS_I845G(dev_priv)     (INTEL_DEVID(dev_priv) == 0x2562)
 #define IS_I85X(dev_priv)      ((dev_priv)->info.platform == INTEL_I85X)
 #define IS_I865G(dev_priv)     (INTEL_DEVID(dev_priv) == 0x2572)
 #define IS_I915G(dev_priv)     ((dev_priv)->info.platform == INTEL_I915G)
@@ -2667,7 +2667,7 @@ intel_info(const struct drm_i915_private *dev_priv)
                ((dev_priv)->info.overlay_needs_physical)
 
 /* Early gen2 have a totally busted CS tlb and require pinned batches. */
-#define HAS_BROKEN_CS_TLB(dev_priv)    (IS_I830(dev_priv) || IS_845G(dev_priv))
+#define HAS_BROKEN_CS_TLB(dev_priv)    (IS_I830(dev_priv) || IS_I845G(dev_priv))
 
 /* WaRsDisableCoarsePowerGating:skl,bxt */
 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
index b3bac2557665b37fae6c941b75a72f2ee7d330dc..c81b22f238c360315c94a35b3931c6cf7417ca22 100644 (file)
@@ -153,7 +153,7 @@ static unsigned long i915_stolen_to_physical(struct drm_i915_private *dev_priv)
                tom = tmp * MB(32);
 
                base = tom - tseg_size - ggtt->stolen_size;
-       } else if (IS_845G(dev_priv)) {
+       } else if (IS_I845G(dev_priv)) {
                u32 tseg_size = 0;
                u32 tom;
                u8 tmp;
index 99e8eed0a1fceaea0bfb59359d18734f6bffd207..2bf9b75ac392c2f5816a89369da9b80eaecd6a8c 100644 (file)
@@ -71,7 +71,7 @@ static const struct intel_device_info intel_i830_info = {
        .num_pipes = 2, /* legal, last one wins */
 };
 
-static const struct intel_device_info intel_845g_info = {
+static const struct intel_device_info intel_i845g_info = {
        GEN2_FEATURES,
        .platform = INTEL_I845G,
 };
@@ -432,7 +432,7 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
  */
 static const struct pci_device_id pciidlist[] = {
        INTEL_I830_IDS(&intel_i830_info),
-       INTEL_I845G_IDS(&intel_845g_info),
+       INTEL_I845G_IDS(&intel_i845g_info),
        INTEL_I85X_IDS(&intel_i85x_info),
        INTEL_I865G_IDS(&intel_i865g_info),
        INTEL_I915G_IDS(&intel_i915g_info),
index ab5ba7e084243b436e9064b8a5c8a0b6092c6282..a41082e2750e51dc6cc5969e1be185d2c5ad718a 100644 (file)
@@ -1233,7 +1233,7 @@ static void assert_cursor(struct drm_i915_private *dev_priv,
 {
        bool cur_state;
 
-       if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+       if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
                cur_state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
        else
                cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
@@ -10936,7 +10936,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
 
        I915_WRITE(CURPOS(pipe), pos);
 
-       if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+       if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
                i845_update_cursor(crtc, base, plane_state);
        else
                i9xx_update_cursor(crtc, base, plane_state);
@@ -10954,11 +10954,11 @@ static bool cursor_size_ok(struct drm_i915_private *dev_priv,
         * the precision of the register. Everything else requires
         * square cursors, limited to a few power-of-two sizes.
         */
-       if (IS_845G(dev_priv) || IS_I865G(dev_priv)) {
+       if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
                if ((width & 63) != 0)
                        return false;
 
-               if (width > (IS_845G(dev_priv) ? 64 : 512))
+               if (width > (IS_I845G(dev_priv) ? 64 : 512))
                        return false;
 
                if (height > 1023)
@@ -16127,7 +16127,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
        else if (IS_I915G(dev_priv))
                dev_priv->display.get_display_clock_speed =
                        i915_get_display_clock_speed;
-       else if (IS_I945GM(dev_priv) || IS_845G(dev_priv))
+       else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
                dev_priv->display.get_display_clock_speed =
                        i9xx_misc_get_display_clock_speed;
        else if (IS_I915GM(dev_priv))
@@ -16549,8 +16549,8 @@ int intel_modeset_init(struct drm_device *dev)
                dev->mode_config.max_height = 8192;
        }
 
-       if (IS_845G(dev_priv) || IS_I865G(dev_priv)) {
-               dev->mode_config.cursor_width = IS_845G(dev_priv) ? 64 : 512;
+       if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
+               dev->mode_config.cursor_width = IS_I845G(dev_priv) ? 64 : 512;
                dev->mode_config.cursor_height = 1023;
        } else if (IS_GEN2(dev_priv)) {
                dev->mode_config.cursor_width = GEN2_CURSOR_WIDTH;
index 0164130c0488ad50ffd741e88a31c14e5b894cb3..bce1ba80f2776ce14574053f14015bd5c3c9a6b4 100644 (file)
@@ -139,7 +139,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
        u32 reserved = 0;
 
        /* On most chips, these bits must be preserved in software. */
-       if (!IS_I830(dev_priv) && !IS_845G(dev_priv))
+       if (!IS_I830(dev_priv) && !IS_I845G(dev_priv))
                reserved = I915_READ_NOTRACE(bus->gpio_reg) &
                                             (GPIO_DATA_PULLUP_DISABLE |
                                              GPIO_CLOCK_PULLUP_DISABLE);
index 90da6a707de7646590fcaa1b194915b6d79d4594..354f8cec96bba321ee1d24b76c83467224fc34c9 100644 (file)
@@ -957,7 +957,7 @@ static int check_overlay_src(struct drm_i915_private *dev_priv,
        u32 tmp;
 
        /* check src dimensions */
-       if (IS_845G(dev_priv) || IS_I830(dev_priv)) {
+       if (IS_I845G(dev_priv) || IS_I830(dev_priv)) {
                if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
                    rec->src_width  > IMAGE_MAX_WIDTH_LEGACY)
                        return -EINVAL;
@@ -1009,7 +1009,7 @@ static int check_overlay_src(struct drm_i915_private *dev_priv,
                return -EINVAL;
 
        /* stride checking */
-       if (IS_I830(dev_priv) || IS_845G(dev_priv))
+       if (IS_I830(dev_priv) || IS_I845G(dev_priv))
                stride_mask = 255;
        else
                stride_mask = 63;
index bc18a4f2643df6c06d7f989cdb6aa1a25ecfc2df..0b7d13b6e2286f070877753990c1543e1001e28e 100644 (file)
@@ -1912,7 +1912,7 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size)
         * of the buffer.
         */
        ring->effective_size = size;
-       if (IS_I830(engine->i915) || IS_845G(engine->i915))
+       if (IS_I830(engine->i915) || IS_I845G(engine->i915))
                ring->effective_size -= 2 * CACHELINE_BYTES;
 
        ring->last_retired_head = -1;
@@ -2608,7 +2608,7 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
                engine->emit_bb_start = gen6_emit_bb_start;
        else if (INTEL_GEN(dev_priv) >= 4)
                engine->emit_bb_start = i965_emit_bb_start;
-       else if (IS_I830(dev_priv) || IS_845G(dev_priv))
+       else if (IS_I830(dev_priv) || IS_I845G(dev_priv))
                engine->emit_bb_start = i830_emit_bb_start;
        else
                engine->emit_bb_start = i915_emit_bb_start;