ARM: dts: r8a7794: add MSTP5 clocks
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Wed, 27 Jul 2016 20:59:59 +0000 (23:59 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Aug 2016 12:36:56 +0000 (14:36 +0200)
Add some MSTP5 clocks to the R8A7794 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7794.dtsi
include/dt-bindings/clock/r8a7794-clock.h

index 5d1fded7963361253b72ed0ece54030cb36ac1d4..1c2d3846d70ea89a80ab2bc8c2a339dc46aedc4a 100644 (file)
                        clock-indices = <R8A7794_CLK_IRQC>;
                        clock-output-names = "irqc";
                };
+               mstp5_clks: mstp5_clks@e6150144 {
+                       compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+                       reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+                       clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
+                       #clock-cells = <1>;
+                       clock-indices = <R8A7794_CLK_AUDIO_DMAC0
+                                        R8A7794_CLK_PWM>;
+                       clock-output-names = "audmac0", "pwm";
+               };
                mstp7_clks: mstp7_clks@e615014c {
                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
index a3491ba2f6ecbf25b9bd40e47f0a582449e3a143..f8279eca033e1c531d0044f5366409d96dbc24f3 100644 (file)
@@ -67,6 +67,7 @@
 #define R8A7794_CLK_IRQC               7
 
 /* MSTP5 */
+#define R8A7794_CLK_AUDIO_DMAC0                2
 #define R8A7794_CLK_PWM                        23
 
 /* MSTP7 */