powerpc: Move ARCH_DLINFO out of uapi
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Sun, 8 Jan 2017 23:31:42 +0000 (17:31 -0600)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 6 Feb 2017 08:46:04 +0000 (19:46 +1100)
It's an kernel private macro, it doesn't belong there

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/elf.h
arch/powerpc/include/uapi/asm/elf.h

index ee46ffef608ee1679033a77c8ff5353ba6bfb51c..730c27ed10e19dfeb39a4882d643968e6bfcf2b9 100644 (file)
@@ -136,4 +136,26 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
 
 #endif /* CONFIG_SPU_BASE */
 
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ *   AUXV is greater than 16 for glibc compatibility.
+ *   AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
+ */
+#define ARCH_DLINFO                                                    \
+do {                                                                   \
+       /* Handle glibc compatibility. */                               \
+       NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
+       NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
+       /* Cache size items */                                          \
+       NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
+       NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
+       NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
+       VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
+} while (0)
+
 #endif /* _ASM_POWERPC_ELF_H */
index 3a9e44c45c7848cac2c8746a3dcac903eb59a682..b2c6fdd5ac30b8674e2d5ff6ee96b9cba51a5163 100644 (file)
@@ -162,29 +162,6 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
 #endif
 
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- *   AUXV is greater than 16 for glibc compatibility.
- *   AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
- */
-#define ARCH_DLINFO                                                    \
-do {                                                                   \
-       /* Handle glibc compatibility. */                               \
-       NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-       NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-       /* Cache size items */                                          \
-       NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
-       NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
-       NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
-       VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
-} while (0)
-
 /* PowerPC64 relocations defined by the ABIs */
 #define R_PPC64_NONE    R_PPC_NONE
 #define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */