IB/mlx4: Fix up fast register page list format
authorVladimir Sokolovsky <vlad@mellanox.co.il>
Mon, 15 Sep 2008 21:25:23 +0000 (14:25 -0700)
committerRoland Dreier <rolandd@cisco.com>
Mon, 15 Sep 2008 21:25:23 +0000 (14:25 -0700)
Byte swap the addresses in the page list for fast register work requests
to big endian to match what the HCA expectx.  Also, the addresses must
have the "present" bit set so that the HCA knows it can access them.
Otherwise the HCA will fault the first time it accesses the memory
region.

Signed-off-by: Vladimir Sokolovsky <vlad@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
drivers/infiniband/hw/mlx4/qp.c
drivers/net/mlx4/mr.c
include/linux/mlx4/device.h

index f29dbb767e87c3c0f77b5f23c8c58de06e85c169..9559248f265b80090aeecd8c693059e9e43bdad0 100644 (file)
@@ -1342,6 +1342,12 @@ static __be32 convert_access(int acc)
 static void set_fmr_seg(struct mlx4_wqe_fmr_seg *fseg, struct ib_send_wr *wr)
 {
        struct mlx4_ib_fast_reg_page_list *mfrpl = to_mfrpl(wr->wr.fast_reg.page_list);
+       int i;
+
+       for (i = 0; i < wr->wr.fast_reg.page_list_len; ++i)
+               wr->wr.fast_reg.page_list->page_list[i] =
+                       cpu_to_be64(wr->wr.fast_reg.page_list->page_list[i] |
+                                   MLX4_MTT_FLAG_PRESENT);
 
        fseg->flags             = convert_access(wr->wr.fast_reg.access_flags);
        fseg->mem_key           = cpu_to_be32(wr->wr.fast_reg.rkey);
index 644adf074a358ede1cfe263d75fc19972428a6b5..d1dd5b48dbd1412bddf6321ebd3cceb89d18bacd 100644 (file)
@@ -71,8 +71,6 @@ struct mlx4_mpt_entry {
 #define MLX4_MPT_PD_FLAG_RAE       (1 << 28)
 #define MLX4_MPT_PD_FLAG_EN_INV            (3 << 24)
 
-#define MLX4_MTT_FLAG_PRESENT          1
-
 #define MLX4_MPT_STATUS_SW             0xF0
 #define MLX4_MPT_STATUS_HW             0x00
 
index 655ea0d1ee1474d11a1dbd23c51bf5ef8f679fda..b2f944468313bb296bbdf83d7ff574615a588b1b 100644 (file)
@@ -141,6 +141,10 @@ enum {
        MLX4_STAT_RATE_OFFSET   = 5
 };
 
+enum {
+       MLX4_MTT_FLAG_PRESENT           = 1
+};
+
 static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
 {
        return (major << 32) | (minor << 16) | subminor;