ASoC: omap-mcbsp: Add support for Left Justified format

Basic support for Left Justified coding for OMAP McBSP.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 2952fb046ed676b7712c92b57d54050010eb47a8..0199e95a5d63d1844e84218c5ca79f179f1fe1ba 100644 (file)
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -331,7 +331,8 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
 
        format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
        wpf = channels = params_channels(params);
-       if (channels == 2 && format == SND_SOC_DAIFMT_I2S) {
+       if (channels == 2 && (format == SND_SOC_DAIFMT_I2S ||
+                             format == SND_SOC_DAIFMT_LEFT_J)) {
                /* Use dual-phase frames */
                regs->rcr2      |= RPHASE;
                regs->xcr2      |= XPHASE;
@@ -376,6 +377,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
        /* Set FS period and length in terms of bit clock periods */
        switch (format) {
        case SND_SOC_DAIFMT_I2S:
+       case SND_SOC_DAIFMT_LEFT_J:
                regs->srgr2     |= FPER(framesize - 1);
                regs->srgr1     |= FWID((framesize >> 1) - 1);
                break;
@@ -427,6 +429,14 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                regs->rcr2      |= RDATDLY(1);
                regs->xcr2      |= XDATDLY(1);
                break;
+       case SND_SOC_DAIFMT_LEFT_J:
+               /* 0-bit data delay */
+               regs->rcr2      |= RDATDLY(0);
+               regs->xcr2      |= XDATDLY(0);
+               regs->spcr1     |= RJUST(2);
+               /* Invert FS polarity configuration */
+               temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
+               break;
        case SND_SOC_DAIFMT_DSP_A:
                /* 1-bit data delay */
                regs->rcr2      |= RDATDLY(1);