ARM: dts: marvell: fix PCI bus dtc warnings
authorRob Herring <robh@kernel.org>
Wed, 26 Jul 2017 21:09:37 +0000 (16:09 -0500)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Thu, 3 Aug 2017 12:29:22 +0000 (14:29 +0200)
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
28 files changed:
Documentation/devicetree/bindings/pci/mvebu-pci.txt
arch/arm/boot/dts/armada-370.dtsi
arch/arm/boot/dts/armada-375.dtsi
arch/arm/boot/dts/armada-380.dtsi
arch/arm/boot/dts/armada-385-db-ap.dts
arch/arm/boot/dts/armada-385-turris-omnia.dts
arch/arm/boot/dts/armada-385.dtsi
arch/arm/boot/dts/armada-388-clearfog.dts
arch/arm/boot/dts/armada-388-clearfog.dtsi
arch/arm/boot/dts/armada-388-db.dts
arch/arm/boot/dts/armada-388-gp.dts
arch/arm/boot/dts/armada-388-rd.dts
arch/arm/boot/dts/armada-390-db.dts
arch/arm/boot/dts/armada-395-gp.dts
arch/arm/boot/dts/armada-398-db.dts
arch/arm/boot/dts/armada-39x.dtsi
arch/arm/boot/dts/armada-xp-98dx3236.dtsi
arch/arm/boot/dts/armada-xp-db.dts
arch/arm/boot/dts/armada-xp-gp.dts
arch/arm/boot/dts/armada-xp-mv78230.dtsi
arch/arm/boot/dts/armada-xp-mv78260.dtsi
arch/arm/boot/dts/armada-xp-mv78460.dtsi
arch/arm/boot/dts/dove-d3plug.dts
arch/arm/boot/dts/dove.dtsi
arch/arm/boot/dts/kirkwood-6192.dtsi
arch/arm/boot/dts/kirkwood-6281.dtsi
arch/arm/boot/dts/kirkwood-6282.dtsi
arch/arm/boot/dts/kirkwood-98dx4122.dtsi

index 2de6f65ecfb11017e31a3313cdc07fce0c9dbb00..e5af2e8461cff177c1750caa191c4430516ed58b 100644 (file)
@@ -286,7 +286,7 @@ pcie-controller {
                status = "disabled";
        };
 
-       pcie@10,0 {
+       pcie@a,0 {
                device_type = "pci";
                assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
                reg = <0x5000 0 0 0 0>;
index f9cf1273f35e0ae65dd4398037f9662bcf4ff28e..b1cf5a26f3c2a460b7b9d8fc41127c30cf2cc533 100644 (file)
@@ -72,7 +72,7 @@
                        reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
                };
 
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-370-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                           0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 58>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                           0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 62>;
                                marvell,pcie-port = <1>;
index 50c5e8417802cd42c3beee13bcf9a23b3a127791..7225c7ce9a8dbca5cb909c0c1b55376072c2e263 100644 (file)
                        };
                };
 
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-370-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
index e392f6036f3956a7b2494d7fb502f5b5a3a99349..132596fd08603e68d458cb264ae23ca48c0c7929 100644 (file)
@@ -71,7 +71,7 @@
                        };
                };
 
-               pcie-controller {
+               pcie {
                        compatible = "marvell,armada-370-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <2>;
index db5b9f6b615d8f8ea430f7ae790bc82858add8e8..25d2d720dc0e2cacc98b402e609e0fe78eb01acb 100644 (file)
                        status = "okay";
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        /*
index be16ce39fb3d659f4833722063a26aa043bace11..06831e1e3f808b8419b299e72d8dfbd94568de3f 100644 (file)
@@ -96,7 +96,7 @@
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        pcie@1,0 {
index 7fcc4c4885cffa9b51fe8c1c9911e4ea3cfcc138..74863aff01c6e0259576403ae22ece1cc12a7d4d 100644 (file)
@@ -70,7 +70,7 @@
        };
 
        soc {
-               pciec: pcie-controller {
+               pciec: pcie {
                        compatible = "marvell,armada-370-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <2>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <3>;
index 0d5f1f06227568389c072194bf7da8ae6957012d..ee7b0089eff035a7f0fda7ed43b6878183c6c53a 100644 (file)
@@ -62,7 +62,7 @@
                        };
                };
 
-               pcie-controller {
+               pcie {
                        pcie@3,0 {
                                /* Port 2, Lane 0. CON2, nearest CPU. */
                                reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
index 0f5938bede53c30ce84f24a9a9b733517cc52118..68acfc9687069bf141c01309608b8806920bb446 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * The two PCIe units are accessible through
index 1ac923826445495edd6f725b44ce9c2134a5382f..a4ec1fa3752979fd30a1c9870a072d217c374b18 100644 (file)
                        status = "okay";
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * The two PCIe units are accessible through
index 895fa6cfa15a9ee1c56c5827f5f5fe2f8e512196..f2eb5464af1ffd088ed2429ae7453e589a761dee 100644 (file)
                        status = "okay";
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * One PCIe units is accessible through
index af82f275eac248791a2286b49c87bfd7c536db08..9cc3ca0376b934e10c863735f3e9a14ee72c0ee1 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * One PCIe units is accessible through
index 2afed2ce47412dce518785bdc1092c27b08766fb..c718a5242595f4157215ea476fccc998372bbccf 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        /* CON30 */
index 2cdbba804c1eaedf2034902e038e1696850c42f3..ef491b524fd6c4c39b391d4c022210c4744f9e37 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        /*
index e8604281c3c9916522d496937c73c1b31c6f22c9..f0e0379f7619220d39defb0f72887623ba850768 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        pcie@1,0 {
index 60fbfd5907c71049e75935cba303f795be38ad72..ea657071e27888c49294556e047f556d499f6300 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        compatible = "marvell,armada-370-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <2>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <3>;
index be22ec5236acfe5f11626a7f50447944564fda60..bdd4c7a45fbf43995f899982c499d9e9c99da5c5 100644 (file)
@@ -91,7 +91,7 @@
                /*
                 * 98DX3236 has 1 x1 PCIe unit Gen2.0
                 */
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-xp-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 58>;
                                marvell,pcie-port = <0>;
index a33974254d8cddb36ee6538bc1eec767c0ce756d..065282c217897fdfdab6ecb0dd365614a6478468 100644 (file)
                /* Port 2, Lane 0 */
                status = "okay";
        };
-       pcie@10,0 {
+       pcie@a,0 {
                /* Port 3, Lane 0 */
                status = "okay";
        };
index d62bf7bea1df4db579d8d22311d40ef8f0eaa25e..ac9eab8ac186c78ba88e0e03907f429886953e04 100644 (file)
                /* Port 2, Lane 0 */
                status = "okay";
        };
-       pcie@10,0 {
+       pcie@a,0 {
                /* Port 3, Lane 0 */
                status = "okay";
        };
index 9f25814077f2b446f9c54ab22ee277a10288fae6..129738f7973d4b4c90cdd79d14864b8e34de76db 100644 (file)
@@ -86,7 +86,7 @@
                 * configured as x4 or quad x1 lanes. One unit is
                 * x1 only.
                 */
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-xp-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 58>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 59>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 60>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 61>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 62>;
                                marvell,pcie-port = <1>;
index 2bfe07aebf1aefae7611c2b7899b824c1527306a..e58d597e37b98a414aa430f4d2635c90315b3a82 100644 (file)
@@ -87,7 +87,7 @@
                 * configured as x4 or quad x1 lanes. One unit is
                 * x4 only.
                 */
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-xp-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 58>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 59>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 60>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 61>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 62>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
                                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 63>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
                                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 64>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
                                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 65>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 99>;
                                marvell,pcie-port = <2>;
index 6c33935f7074730e193781173661ad717a202e32..a5c961cee7de3856d33046ca365d5d0f998d993c 100644 (file)
                 * configured as x4 or quad x1 lanes. Two units are
                 * x4/x1.
                 */
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,armada-xp-pcie";
                        status = "disabled";
                        device_type = "pci";
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 58>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 59>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 60>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 61>;
                                marvell,pcie-port = <0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 62>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
                                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 63>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
                                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 64>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
                                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 65>;
                                marvell,pcie-port = <1>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 99>;
                                marvell,pcie-port = <2>;
                                status = "disabled";
                        };
 
-                       pcie10: pcie@10,0 {
+                       pcie10: pcie@a,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
                                reg = <0x5000 0 0 0 0>;
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
                                          0x81000000 0 0 0x81000000 0xa 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 103>;
                                marvell,pcie-port = <3>;
index f5f59bb5a53464eb9bcaeb7d035a28236790abc1..e88ff83f1dec8eb6a67332aedbb4e46cd4c4d957 100644 (file)
@@ -88,7 +88,7 @@
 &pcie {
        status = "okay";
        /* Fresco Logic USB3.0 xHCI controller */
-       pcie-port@0 {
+       pcie@1 {
                status = "okay";
                reset-gpios = <&gpio0 26 1>;
                reset-delay-us = <20000>;
@@ -96,7 +96,7 @@
                pinctrl-names = "default";
        };
        /* Mini-PCIe slot */
-       pcie-port@1 {
+       pcie@2 {
                status = "okay";
                reset-gpios = <&gpio0 25 1>;
        };
index 698d58cea20d2e8c1a3c7d8e7a4dadb717847624..1475d3672e56343e286f0883efbf1ed49fdb2e72 100644 (file)
@@ -89,7 +89,7 @@
                          MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000   /* CESA SRAM  1M */
                          MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU  SRAM  1M */
 
-               pcie: pcie-controller {
+               pcie: pcie {
                        compatible = "marvell,dove-pcie";
                        status = "disabled";
                        device_type = "pci";
                                  0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0   /* Port 1.0 Mem */
                                  0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
 
-                       pcie0: pcie-port@0 {
+                       pcie0: pcie@1 {
                                device_type = "pci";
                                status = "disabled";
                                assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
                                #size-cells = <2>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
 
                                #interrupt-cells = <1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 16>;
                        };
 
-                       pcie1: pcie-port@1 {
+                       pcie1: pcie@2 {
                                device_type = "pci";
                                status = "disabled";
                                assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
                                #size-cells = <2>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
 
                                #interrupt-cells = <1>;
                                interrupt-map-mask = <0 0 0 0>;
index d573e03f3134b709f8d6c8ef6ca37c4d7dc9b9c4..f003f3f1bd659d39139f03890565162cc6e321b6 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus@f1000000 {
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -24,6 +24,7 @@
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 9>;
                                marvell,pcie-port = <0>;
index 748d0b62f233348f4e0c01216053087932a327b0..47d4b3d3d9e969ee5ca47dd32fb0c53035c8e700 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus@f1000000 {
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -24,6 +24,7 @@
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 9>;
                                marvell,pcie-port = <0>;
index bb63d2d50fc533f9f264b16ef7fe8b6b3ba441ac..a13dad0a7c080b84db015d36d949daa544bcb05f 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus@f1000000 {
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -28,6 +28,7 @@
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 9>;
                                marvell,pcie-port = <0>;
@@ -45,6 +46,7 @@
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 10>;
                                marvell,pcie-port = <1>;
index 720c210d491dc80e25241dac26506dd52533010e..90d4d71b6683cbaa196a9fe16581dce41ef44ea1 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus@f1000000 {
-               pciec: pcie-controller@82000000 {
+               pciec: pcie@82000000 {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -24,6 +24,7 @@
                                #interrupt-cells = <1>;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                               bus-range = <0x00 0xff>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &intc 9>;
                                marvell,pcie-port = <0>;