dt-bindings: clk: gxbb: expose i2s output clock gates
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 9 Mar 2017 10:41:54 +0000 (11:41 +0100)
committerKevin Hilman <khilman@baylibre.com>
Tue, 4 Apr 2017 18:00:05 +0000 (11:00 -0700)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com

drivers/clk/meson/gxbb.h
include/dt-bindings/clock/gxbb-clkc.h

index 8ee2022ce5d563a20a6ee8b252b9e6f99543c8af..274f587648538181ffa21e4e4b3f47f7d6c40091 100644 (file)
 #define CLKID_I2S_SPDIF                  35
 /* CLKID_ETH */
 #define CLKID_DEMUX              37
-#define CLKID_AIU_GLUE           38
+/* CLKID_AIU_GLUE */
 #define CLKID_IEC958             39
-#define CLKID_I2S_OUT            40
+/* CLKID_I2S_OUT */
 #define CLKID_AMCLK              41
 #define CLKID_AIFIFO2            42
 #define CLKID_MIXER              43
-#define CLKID_MIXER_IFACE        44
+/* CLKID_MIXER_IFACE */
 #define CLKID_ADC                45
 #define CLKID_BLKMV              46
-#define CLKID_AIU                47
+/* CLKID_AIU */
 #define CLKID_UART1              48
 #define CLKID_G2D                49
 /* CLKID_USB0 */
 /* CLKID_GCLK_VENCI_INT0 */
 #define CLKID_GCLK_VENCI_INT     78
 #define CLKID_DAC_CLK            79
-#define CLKID_AOCLK_GATE         80
+/* CLKID_AOCLK_GATE */
 #define CLKID_IEC958_GATE        81
 #define CLKID_ENC480P            82
 #define CLKID_RNG1               83
index 692846c7941b53ac8449ed69a21b2a946a89c3bf..f08f06dd770258681bfbe83c88039ea6ffca6b97 100644 (file)
 #define CLKID_I2C              22
 #define CLKID_SAR_ADC          23
 #define CLKID_ETH              36
+#define CLKID_AIU_GLUE         38
+#define CLKID_I2S_OUT          40
+#define CLKID_MIXER_IFACE      44
+#define CLKID_AIU              47
 #define CLKID_USB0             50
 #define CLKID_USB1             51
 #define CLKID_USB              55
@@ -24,6 +28,7 @@
 #define CLKID_USB0_DDR_BRIDGE  65
 #define CLKID_SANA             69
 #define CLKID_GCLK_VENCI_INT0  77
+#define CLKID_AOCLK_GATE       80
 #define CLKID_AO_I2C           93
 #define CLKID_SD_EMMC_A                94
 #define CLKID_SD_EMMC_B                95