void *stack;
};
extern struct secondary_data secondary_data;
+extern volatile int pen_release;
extern int __cpu_disable(void);
*/
struct secondary_data secondary_data;
+/*
+ * control for which core is the next to come out of the secondary
+ * boot "holding pen"
+ */
+volatile int __cpuinitdata pen_release = -1;
+
enum ipi_msg_type {
IPI_TIMER = 2,
IPI_RESCHEDULE,
#include "common.h"
-extern volatile int pen_release;
-
static inline void cpu_enter_lowpower(void)
{
unsigned int v;
#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM5 : S5P_VA_SYSRAM)
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-
-volatile int __cpuinitdata pen_release = -1;
-
/*
* Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency
#include "core.h"
-extern volatile int pen_release;
-
static inline void cpu_enter_lowpower(void)
{
/* Just flush the cache. Changing the coherency is not yet
#define GIC_PPI_EDGE_MASK 0xFFFFD7FF
extern void msm_secondary_startup(void);
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen".
- */
-volatile int pen_release = -1;
static DEFINE_SPINLOCK(boot_lock);
#include <asm/cp15.h>
#include <asm/smp_plat.h>
-extern volatile int pen_release;
-
static inline void cpu_enter_lowpower(void)
{
unsigned int v;
#include <asm/cp15.h>
#include <asm/smp_plat.h>
-extern volatile int pen_release;
-
static inline void cpu_enter_lowpower(void)
{
unsigned int v;
#include <mach/spear.h>
#include <mach/generic.h>
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-volatile int __cpuinitdata pen_release = -1;
static DEFINE_SPINLOCK(boot_lock);
static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
#include <mach/setup.h>
-extern volatile int pen_release;
-
/*
* platform-specific code to shutdown a CPU
*
/* This is called from headsmp.S to wakeup the secondary core */
extern void u8500_secondary_startup(void);
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-volatile int pen_release = -1;
-
/*
* Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency
#include <asm/smp_plat.h>
#include <asm/cp15.h>
-extern volatile int pen_release;
-
static inline void cpu_enter_lowpower(void)
{
unsigned int v;
#include <asm/smp_plat.h>
#include <asm/hardware/gic.h>
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-volatile int __cpuinitdata pen_release = -1;
-
/*
* Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency