* more details.
*/
+/* Include the proper base SPR definition file. */
+#ifdef __tilegx__
+#include <arch/spr_def_64.h>
+#else
+#include <arch/spr_def_32.h>
+#endif
+
+#ifdef __KERNEL__
+
/*
* In addition to including the proper base SPR definition file, depending
* on machine architecture, this file defines several macros which allow
#define _concat4(a, b, c, d) __concat4(a, b, c, d)
#ifdef __tilegx__
-#include <arch/spr_def_64.h>
/* TILE-Gx dependent, protection-level dependent SPRs. */
_concat4(INT_SINGLE_STEP_, CONFIG_KERNEL_PL,,)
#else
-#include <arch/spr_def_32.h>
/* TILEPro dependent, protection-level dependent SPRs. */
_concat4(SPR_INTCTRL_, CONFIG_KERNEL_PL, _STATUS,)
#define INT_INTCTRL_K \
_concat4(INT_INTCTRL_, CONFIG_KERNEL_PL,,)
+
+#endif /* __KERNEL__ */
--- /dev/null
+#include <asm-generic/fb.h>
#endif
#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
+#define ioremap_wc(physaddr, size) ioremap(physaddr, size)
#define ioremap_writethrough(physaddr, size) ioremap(physaddr, size)
#define ioremap_fullcache(physaddr, size) ioremap(physaddr, size)
#define iowrite32 writel
#define iowrite64 writeq
+static inline void memset_io(void *dst, int val, size_t len)
+{
+ int x;
+ BUG_ON((unsigned long)dst & 0x3);
+ val = (val & 0xff) * 0x01010101;
+ for (x = 0; x < len; x += 4)
+ writel(val, dst + x);
+}
+
static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
size_t len)
{
ioport_panic();
}
+#define ioread16be(addr) be16_to_cpu(ioread16(addr))
+#define ioread32be(addr) be32_to_cpu(ioread32(addr))
+#define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr))
+#define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr))
+
#define ioread8_rep(p, dst, count) \
insb((unsigned long) (p), (dst), (count))
#define ioread16_rep(p, dst, count) \
#define iowrite32_rep(p, src, count) \
outsl((unsigned long) (p), (src), (count))
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
#endif /* _ASM_TILE_IO_H */
/* IRQ numbers used for linux IPIs. */
#define IRQ_RESCHEDULE 1
+#define irq_canonicalize(irq) (irq)
+
void ack_bad_irq(unsigned int irq);
/*
/* Must be a macro since it is used to create constants. */
#define __pgprot(val) hv_pte(val)
+/* Rarely-used initializers, typically with a "zero" value. */
+#define __pte(x) hv_pte(x)
+#define __pgd(x) hv_pte(x)
+
static inline u64 pgprot_val(pgprot_t pgprot)
{
return hv_pte_val(pgprot);
typedef HV_PTE pmd_t;
+#define __pmd(x) hv_pte(x)
+
static inline u64 pmd_val(pmd_t pmd)
{
return hv_pte_val(pmd);
/* Provide as macros since these require some other headers included. */
#define page_to_pa(page) ((phys_addr_t)(page_to_pfn(page)) << PAGE_SHIFT)
-#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn(kaddr))
+#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn((void *)(kaddr)))
#define page_to_virt(page) pfn_to_kaddr(page_to_pfn(page))
struct mm_struct;
--- /dev/null
+#include <asm-generic/parport.h>
--- /dev/null
+#include <asm-generic/serial.h>
-#ifdef CONFIG_COMPAT
+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
#define __ARCH_WANT_STAT64 /* Used for compat_sys_stat64() etc. */
#endif
#include <asm-generic/stat.h>
/* Tile gcc is always >= 4.3.0, so we use __builtin_bswap. */
#define __arch_swab32(x) __builtin_bswap32(x)
#define __arch_swab64(x) __builtin_bswap64(x)
-
-/* Use the variant that is natural for the wordsize. */
-#ifdef CONFIG_64BIT
-#define __arch_swab16(x) (__builtin_bswap64(x) >> 48)
-#else
#define __arch_swab16(x) (__builtin_bswap32(x) >> 16)
-#endif
#endif /* _ASM_TILE_SWAB_H */
--- /dev/null
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for
+ * more details.
+ *
+ * Access to VGA videoram.
+ */
+
+#ifndef _ASM_TILE_VGA_H
+#define _ASM_TILE_VGA_H
+
+#include <asm/io.h>
+
+#define VT_BUF_HAVE_RW
+
+static inline void scr_writew(u16 val, volatile u16 *addr)
+{
+ __raw_writew(val, (volatile u16 __iomem *) addr);
+}
+
+static inline u16 scr_readw(volatile const u16 *addr)
+{
+ return __raw_readw((volatile const u16 __iomem *) addr);
+}
+
+#define vga_readb(a) readb((u8 __iomem *)(a))
+#define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a))
+
+#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(x, s))
+
+#endif
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/delay.h>
+#include <linux/module.h>
#include <asm/irq_regs.h>
#include <asm/traps.h>
#include <hv/hypervisor.h>
return (((cycles_t)high) << 32) | low;
}
+EXPORT_SYMBOL(get_cycles);
#endif
/*