projects
/
GitHub
/
MotorolaMobilityLLC
/
kernel-slsi.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
38d9628
)
arm64: tlb: remove redundant barrier from __flush_tlb_pgtable
author
Will Deacon
<will.deacon@arm.com>
Tue, 6 Oct 2015 17:46:29 +0000
(18:46 +0100)
committer
Catalin Marinas
<catalin.marinas@arm.com>
Wed, 7 Oct 2015 10:56:33 +0000
(11:56 +0100)
__flush_tlb_pgtable is used to invalidate intermediate page table
entries after they have been cleared and are about to be freed. Since
pXd_clear imply memory barriers, we don't need the extra one here.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/tlbflush.h
patch
|
blob
|
blame
|
history
diff --git
a/arch/arm64/include/asm/tlbflush.h
b/arch/arm64/include/asm/tlbflush.h
index 93e9f964805c616c8492e97e3471fbf2ab9789bd..b460ae28e3463db46816f678c5f90988c3f059de 100644
(file)
--- a/
arch/arm64/include/asm/tlbflush.h
+++ b/
arch/arm64/include/asm/tlbflush.h
@@
-163,7
+163,6
@@
static inline void __flush_tlb_pgtable(struct mm_struct *mm,
{
unsigned long addr = uaddr >> 12 | (ASID(mm) << 48);
- dsb(ishst);
asm("tlbi vae1is, %0" : : "r" (addr));
dsb(ish);
}