Merge tag 'drm-intel-next-2013-06-18' of git://people.freedesktop.org/~danvet/drm...
authorDave Airlie <airlied@redhat.com>
Thu, 27 Jun 2013 23:50:34 +0000 (09:50 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 27 Jun 2013 23:50:34 +0000 (09:50 +1000)
Last 3.11 feature pull. I have a few odds bits and pieces and fixes in my
queue, I'll sort them out later on to see what's for 3.11-fixes and what's
for 3.12. But nothing to hold this here up imo.

Highlights:
- more hangcheck work from Mika and Chris to prepare for arb robustness
- trickle feed fixes from Ville
- first parts of the shared pch pll rework, with some basic hw state
  readout and cross-checking (this shuts up the confused pch pll refcount
  WARN that Linus just recently forwarded)
- Haswell audio power well support from Wang Xingchao (alsa bits acked by
  Takashi)
- some cleanups and asserts sprinkling around the plane/gamma enabling
  sequence from Ville
- more gtt refactoring from Ben
- clear up the adjusted->mode vs. pixel clock vs. port clock confusion
- 30bpp support, this time for real hopefully

* tag 'drm-intel-next-2013-06-18' of git://people.freedesktop.org/~danvet/drm-intel: (97 commits)
  drm/i915: remove a superflous semi-colon
  drm/i915: Kill useless "Enable panel fitter" comments
  drm/i915: Remove extra "ring" from error message
  drm/i915: simplify the reduced clock handling for pch plls
  drm/i915: stop killing pfit on i9xx
  drm/i915: explicitly set up PIPECONF (and gamma table) on haswell
  drm/i915: set up PIPECONF explicitly for i9xx/vlv platforms
  drm/i915: set up PIPECONF explicitly on ilk-ivb
  drm/i915: find guilty batch buffer on ring resets
  drm/i915: store ring hangcheck action
  drm/i915: add batch bo to i915_add_request()
  drm/i915: change i915_add_request to macro
  drm/i915: add i915_gem_context_get_hang_stats()
  drm/i915: add struct i915_ctx_hang_stats
  drm/i915: Try harder to disable trickle feed on VLV
  drm/i915: fix up pch pll enabling for pixel multipliers
  drm/i915: hw state readout and cross-checking for shared dplls
  drm/i915: WARN on lack of shared dpll
  drm/i915: split up intel_modeset_check_state
  drm/i915: extract readout_hw_state from setup_hw_state
  ...

Conflicts:
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_fb.c
drivers/gpu/drm/i915/intel_sdvo.c

1  2 
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_fb.c
drivers/gpu/drm/i915/intel_lvds.c
drivers/gpu/drm/i915/intel_sdvo.c

Simple merge
Simple merge
Simple merge
Simple merge
index 6eb99e13c37d03b86325e5e5a24fb70f0c2c1503,218bc938936e8fb3b6a77e7c3a822df0fed44185..b08d1f9ce0de77a9360b7263ff64bb09875548c0
@@@ -8177,11 -8264,14 +8264,19 @@@ check_crtc_state(struct drm_device *dev
  
                active = dev_priv->display.get_pipe_config(crtc,
                                                           &pipe_config);
 +
 +              /* hw state is inconsistent with the pipe A quirk */
 +              if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
 +                      active = crtc->active;
 +
+               list_for_each_entry(encoder, &dev->mode_config.encoder_list,
+                                   base.head) {
+                       if (encoder->base.crtc != &crtc->base)
+                               continue;
+                       if (encoder->get_config)
+                               encoder->get_config(encoder, &pipe_config);
+               }
                WARN(crtc->active != active,
                     "crtc active state doesn't match with hw state "
                     "(expected %i, found %i)\n", crtc->active, active);
Simple merge
index 3b03c3c6cc5d410197082c6fbd2d897c952032f6,244060ad354bcb12b18eb018a11b1de23111cfc4..dff669e2387f4e5aa8fd84433935e4603ec43992
@@@ -291,7 -292,9 +292,7 @@@ void intel_fb_output_poll_changed(struc
  void intel_fb_restore_mode(struct drm_device *dev)
  {
        int ret;
-       drm_i915_private_t *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = dev->dev_private;
 -      struct drm_mode_config *config = &dev->mode_config;
 -      struct drm_plane *plane;
  
        if (INTEL_INFO(dev)->num_pipes == 0)
                return;
Simple merge
index c5584193770522b2d9e0ec9bc4daceea46f3a954,b8e1623be30d57a70570536f4f7aa2d1a771c712..2628d56224499307cffa4e409a646122a9578db0
@@@ -2848,18 -2889,12 +2889,6 @@@ bool intel_sdvo_init(struct drm_device 
                }
        }
  
-       hotplug_mask = 0;
-       if (IS_G4X(dev)) {
-               hotplug_mask = intel_sdvo->is_sdvob ?
-                       SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
-       } else if (IS_GEN4(dev)) {
-               hotplug_mask = intel_sdvo->is_sdvob ?
-                       SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
-       } else {
-               hotplug_mask = intel_sdvo->is_sdvob ?
-                       SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
-       }
 -      /* Only enable the hotplug irq if we need it, to work around noisy
 -       * hotplug lines.
 -       */
 -      if (intel_sdvo->hotplug_active)
 -              intel_encoder->hpd_pin = HPD_SDVO_B ? HPD_SDVO_B : HPD_SDVO_C;
--
        intel_encoder->compute_config = intel_sdvo_compute_config;
        intel_encoder->disable = intel_disable_sdvo;
        intel_encoder->mode_set = intel_sdvo_mode_set;