ARM: mx5/mm: Remove MX51_DEBUG related mapping

MX51_DEBUG related mapping is dead code, no-one uses it

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 999f0d3623c515dc86e297c512f5cf320597817c..0002b6815b0d7fcf72b628a02bc0e6cbeb204743 100644 (file)
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -36,7 +36,6 @@ static struct map_desc mx50_io_desc[] __initdata = {
  */
 static struct map_desc mx51_io_desc[] __initdata = {
        imx_map_entry(MX51, IRAM, MT_DEVICE),
-       imx_map_entry(MX51, DEBUG, MT_DEVICE),
        imx_map_entry(MX51, AIPS1, MT_DEVICE),
        imx_map_entry(MX51, SPBA0, MT_DEVICE),
        imx_map_entry(MX51, AIPS2, MT_DEVICE),

diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a8bfd565dcad2ba73f60695ac01bf97c9e90ba81..33728aa2af47e255652e3278208f5459eec6988c 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -82,7 +82,6 @@
  *     AIPS2   0x63f00000+0x100000     ->      0xf5300000+0x100000
  * mx51:
  *     IRAM    0x1ffe0000+0x020000     ->      0xf4fe0000+0x020000
- *     DEBUG   0x60000000+0x100000     ->      0xf5000000+0x100000
  *     SPBA0   0x70000000+0x100000     ->      0xf5400000+0x100000
  *     AIPS1   0x73f00000+0x100000     ->      0xf5700000+0x100000
  *     AIPS2   0x83f00000+0x100000     ->      0xf4300000+0x100000

diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index dede19a766ff5275467827db2796a6bcdf73c310..652f2b0512973d09b31f2d73c1e4ef30ff408404 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -18,18 +18,6 @@
 #define MX51_GPU_CTRL_BASE_ADDR                0x30000000
 #define MX51_IPU_CTRL_BASE_ADDR                0x40000000
 
-#define MX51_DEBUG_BASE_ADDR           0x60000000
-#define MX51_DEBUG_SIZE                        SZ_1M
-
-#define MX51_ETB_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x01000)
-#define MX51_ETM_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x02000)
-#define MX51_TPIU_BASE_ADDR            (MX51_DEBUG_BASE_ADDR + 0x03000)
-#define MX51_CTI0_BASE_ADDR            (MX51_DEBUG_BASE_ADDR + 0x04000)
-#define MX51_CTI1_BASE_ADDR            (MX51_DEBUG_BASE_ADDR + 0x05000)
-#define MX51_CTI2_BASE_ADDR            (MX51_DEBUG_BASE_ADDR + 0x06000)
-#define MX51_CTI3_BASE_ADDR            (MX51_DEBUG_BASE_ADDR + 0x07000)
-#define MX51_CORTEX_DBG_BASE_ADDR      (MX51_DEBUG_BASE_ADDR + 0x08000)
-
 /*
  * SPBA global module enabled #0
  */