net: mvneta: Try to get named core clock first
authorJisheng Zhang <jszhang@marvell.com>
Wed, 20 Jan 2016 11:27:23 +0000 (19:27 +0800)
committerDavid S. Miller <davem@davemloft.net>
Thu, 21 Jan 2016 20:04:59 +0000 (12:04 -0800)
Some platforms may provide more than one clk for the mvneta IP, for
example Marvell BG4CT provides one clk for the mac core, and one
clk for the AXI bus logic.

To support for more than one clock, we'll need to distinguish between
the clock by name. Change clock probing to first try to get "core"
clock before falling back to unnamed clock.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/mvneta.c

index 07d837dc39de55fcaec60dd74835410ce16365ea..406705580a3305aacccefacb82e9f358a7a12103 100644 (file)
@@ -3604,7 +3604,9 @@ static int mvneta_probe(struct platform_device *pdev)
 
        pp->indir[0] = rxq_def;
 
-       pp->clk = devm_clk_get(&pdev->dev, NULL);
+       pp->clk = devm_clk_get(&pdev->dev, "core");
+       if (IS_ERR(pp->clk))
+               pp->clk = devm_clk_get(&pdev->dev, NULL);
        if (IS_ERR(pp->clk)) {
                err = PTR_ERR(pp->clk);
                goto err_put_phy_node;