struct device_node *np, *cpus;
bool is_a7_a8_a9 = false;
bool is_a15 = false;
+ bool has_arch_timer = false;
u32 max_freq = 0;
cpus = of_find_node_by_path("/cpus");
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
- if (of_device_is_compatible(np, "arm,cortex-a7") ||
- of_device_is_compatible(np, "arm,cortex-a8") ||
- of_device_is_compatible(np, "arm,cortex-a9"))
+ if (of_device_is_compatible(np, "arm,cortex-a8") ||
+ of_device_is_compatible(np, "arm,cortex-a9")) {
is_a7_a8_a9 = true;
- else if (of_device_is_compatible(np, "arm,cortex-a15"))
+ } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
+ is_a7_a8_a9 = true;
+ has_arch_timer = true;
+ } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
is_a15 = true;
+ has_arch_timer = true;
+ }
}
of_node_put(cpus);
if (!max_freq)
return;
- if (is_a7_a8_a9)
- shmobile_setup_delay_hz(max_freq, 1, 3);
- else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
- shmobile_setup_delay_hz(max_freq, 2, 4);
+ if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
+ if (is_a7_a8_a9)
+ shmobile_setup_delay_hz(max_freq, 1, 3);
+ else if (is_a15)
+ shmobile_setup_delay_hz(max_freq, 2, 4);
+ }
}
static void __init shmobile_late_time_init(void)