* Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
*
- * Based on the islsm (softmac prism54) driver, which is:
- * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
+ * Based on:
+ * - the islsm (softmac prism54) driver, which is:
+ * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
+ * - stlc45xx driver
+ * C\ 2 Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
{
struct p54_common *priv = dev->priv;
- struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
+ struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
struct ieee80211_rx_status rx_status = {0};
u16 freq = le16_to_cpu(hdr->freq);
size_t header_len = sizeof(*hdr);
u32 tsf32;
- if (!(hdr->magic & cpu_to_le16(0x0001))) {
+ if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
if (priv->filter_flags & FIF_FCSFAIL)
rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
else
rx_status.flag |= RX_FLAG_TSFT;
- if (hdr->magic & cpu_to_le16(0x4000))
+ if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
header_len += hdr->align[0];
skb_pull(skb, header_len);
spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
kfree_skb(skb);
- if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
+ if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
p54_wake_free_queues(dev);
}
static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
{
struct p54_common *priv = dev->priv;
- struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
- struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
+ struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
+ struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
struct memrecord *range = NULL;
spin_lock_irqsave(&priv->tx_queue.lock, flags);
while (entry != (struct sk_buff *)&priv->tx_queue) {
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
- struct p54_control_hdr *entry_hdr;
- struct p54_tx_control_allocdata *entry_data;
+ struct p54_hdr *entry_hdr;
+ struct p54_tx_data *entry_data;
int pad = 0;
range = (void *)info->rate_driver_data;
BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
status.ampdu_ack_len) != 23);
- entry_hdr = (struct p54_control_hdr *) entry->data;
- entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
- if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
+ entry_hdr = (struct p54_hdr *) entry->data;
+ entry_data = (struct p54_tx_data *) entry_hdr->data;
+ if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
pad = entry_data->align[0];
/* walk through the rates array and adjust the counts */
- count = payload->retries;
+ count = payload->tries;
for (idx = 0; idx < 4; idx++) {
if (count >= info->status.rates[idx].count) {
count -= info->status.rates[idx].count;
if (payload->status & 0x02)
info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
info->status.ack_signal = p54_rssi_to_dbm(dev,
- le16_to_cpu(payload->ack_rssi));
+ (int)payload->ack_rssi);
skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
ieee80211_tx_status_irqsafe(dev, entry);
goto out;
spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
out:
- if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
+ if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
p54_wake_free_queues(dev);
}
static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
struct sk_buff *skb)
{
- struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
+ struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
struct p54_common *priv = dev->priv;
static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
{
struct p54_common *priv = dev->priv;
- struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
+ struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
u32 tsf32 = le32_to_cpu(stats->tsf32);
static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
{
- struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
+ struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
switch (le16_to_cpu(hdr->type)) {
case P54_CONTROL_TYPE_TXDONE:
* allocated areas.
*/
static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
- struct p54_control_hdr *data, u32 len)
+ struct p54_hdr *data, u32 len)
{
struct p54_common *priv = dev->priv;
struct sk_buff *entry = priv->tx_queue.next;
__skb_queue_after(&priv->tx_queue, target_skb, skb);
spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
- if (largest_hole < priv->headroom + sizeof(struct p54_control_hdr) +
+ if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
ieee80211_stop_queues(dev);
u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
{
struct p54_common *priv = dev->priv;
- struct p54_control_hdr *hdr;
+ struct p54_hdr *hdr;
struct sk_buff *skb;
skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
return NULL;
skb_reserve(skb, priv->tx_hdr_len);
- hdr = (struct p54_control_hdr *) skb_put(skb, sizeof(*hdr));
- hdr->magic1 = cpu_to_le16(hdr_flags);
+ hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
+ hdr->flags = cpu_to_le16(hdr_flags);
hdr->len = cpu_to_le16(len - sizeof(*hdr));
hdr->type = cpu_to_le16(type);
- hdr->retry1 = hdr->retry2 = 0;
+ hdr->tries = hdr->rts_tries = 0;
if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
kfree_skb(skb);
int p54_read_eeprom(struct ieee80211_hw *dev)
{
struct p54_common *priv = dev->priv;
- struct p54_control_hdr *hdr = NULL;
+ struct p54_hdr *hdr = NULL;
struct p54_eeprom_lm86 *eeprom_hdr;
struct sk_buff *skb;
size_t eeprom_size = 0x2020, offset = 0, blocksize;
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_tx_queue_stats *current_queue;
struct p54_common *priv = dev->priv;
- struct p54_control_hdr *hdr;
- struct p54_tx_control_allocdata *txhdr;
+ struct p54_hdr *hdr;
+ struct p54_tx_data *txhdr;
size_t padding, len;
int i, j, ridx;
u8 rate;
padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
len = skb->len;
- txhdr = (struct p54_tx_control_allocdata *)
- skb_push(skb, sizeof(*txhdr) + padding);
- hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
+ txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
+ hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
if (padding)
- hdr->magic1 = cpu_to_le16(0x4010);
+ hdr->flags = cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN);
else
- hdr->magic1 = cpu_to_le16(0x0010);
+ hdr->flags = cpu_to_le16(0);
hdr->len = cpu_to_le16(len);
hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
- hdr->retry1 = info->control.rates[0].count;
+ hdr->rts_tries = info->control.rates[0].count;
/*
* we register the rates in perfect order, and
ridx++;
}
}
- hdr->retry2 = ridx;
-
+ hdr->tries = ridx;
+ txhdr->crypt_offset = 0;
+ txhdr->rts_rate_idx = 0;
txhdr->key_type = 0;
txhdr->key_len = 0;
txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
+ txhdr->backlog = 32;
+ memset(txhdr->durations, 0, sizeof(txhdr->durations));
txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
2 : info->antenna_sel_tx - 1;
txhdr->output_power = priv->output_power;
- txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
- 0 : cts_rate;
+ txhdr->cts_rate = cts_rate;
if (padding)
txhdr->align[0] = padding;
struct sk_buff *skb;
struct p54_setup_mac *setup;
- skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
- sizeof(*setup), P54_CONTROL_TYPE_SETUP,
+ skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
+ sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
GFP_ATOMIC);
if (!skb)
return -ENOMEM;
{
struct p54_common *priv = dev->priv;
struct sk_buff *skb;
- struct p54_tx_control_channel *chan;
+ struct p54_scan *chan;
unsigned int i;
- size_t data_len = sizeof(struct p54_control_hdr) + sizeof(*chan);
void *entry;
- skb = p54_alloc_skb(dev, 0x8001, data_len,
- P54_CONTROL_TYPE_CHANNEL_CHANGE, GFP_ATOMIC);
+ skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
+ sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
+ GFP_ATOMIC);
if (!skb)
return -ENOMEM;
- chan = (struct p54_tx_control_channel *) skb_put(skb, sizeof(*chan));
+ chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
memset(chan->padding1, 0, sizeof(chan->padding1));
- chan->flags = cpu_to_le16(0x1);
+ chan->mode = cpu_to_le16(P54_SCAN_EXIT);
chan->dwell = cpu_to_le16(0x0);
for (i = 0; i < priv->iq_autocal_len; i++) {
}
if (priv->fw_var < 0x500) {
- data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
chan->v1.rssical_mul = cpu_to_le16(130);
chan->v1.rssical_add = cpu_to_le16(0xfe70);
} else {
chan->v2.rssical_mul = cpu_to_le16(130);
chan->v2.rssical_add = cpu_to_le16(0xfe70);
chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
+ memset(chan->v2.rts_rates, 0, 8);
}
priv->tx(dev, skb, 1);
return 0;
{
struct p54_common *priv = dev->priv;
struct sk_buff *skb;
- struct p54_tx_control_led *led;
+ struct p54_led *led;
- skb = p54_alloc_skb(dev, 0x8001, sizeof(*led) +
- sizeof(struct p54_control_hdr),
- P54_CONTROL_TYPE_LED, GFP_ATOMIC);
+ skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
+ sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
+ GFP_ATOMIC);
if (!skb)
return -ENOMEM;
- led = (struct p54_tx_control_led *)skb_put(skb, sizeof(*led));
+ led = (struct p54_led *)skb_put(skb, sizeof(*led));
led->mode = cpu_to_le16(mode);
led->led_permanent = cpu_to_le16(link);
led->led_temporary = cpu_to_le16(act);
struct sk_buff *skb;
struct p54_edcf *edcf;
- skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
- sizeof(*edcf), P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
+ skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
+ sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
+ GFP_ATOMIC);
if (!skb)
return -ENOMEM;
{
struct p54_common *priv = dev->priv;
- priv->cached_stats = p54_alloc_skb(dev, 0x8000,
- sizeof(struct p54_control_hdr) +
- sizeof(struct p54_statistics),
- P54_CONTROL_TYPE_STAT_READBACK,
- GFP_KERNEL);
+ priv->cached_stats = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL,
+ sizeof(struct p54_hdr) + sizeof(struct p54_statistics),
+ P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
if (!priv->cached_stats)
return -ENOMEM;
memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
- p54_setup_mac(dev, 0, NULL);
+ p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
switch (conf->type) {
case NL80211_IFTYPE_STATION:
- p54_setup_mac(dev, 1, NULL);
+ p54_setup_mac(dev, P54_FILTER_TYPE_STATION, NULL);
break;
default:
BUG(); /* impossible */
struct p54_common *priv = dev->priv;
priv->mode = NL80211_IFTYPE_MONITOR;
memset(priv->mac_addr, 0, ETH_ALEN);
- p54_setup_mac(dev, 0, NULL);
+ p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
}
static int p54_config(struct ieee80211_hw *dev, u32 changed)
struct p54_common *priv = dev->priv;
mutex_lock(&priv->conf_mutex);
- p54_setup_mac(dev, 0, conf->bssid);
+ p54_setup_mac(dev, P54_FILTER_TYPE_STATION, conf->bssid);
p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
memcpy(priv->bssid, conf->bssid, ETH_ALEN);
mutex_unlock(&priv->conf_mutex);
{
struct p54_common *priv = dev->priv;
struct sk_buff *skb;
- struct p54_tx_control_xbow_synth *xbow;
+ struct p54_xbow_synth *xbow;
- skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
- sizeof(*xbow), P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
+ skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
+ sizeof(struct p54_hdr),
+ P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
GFP_KERNEL);
if (!skb)
return -ENOMEM;
- xbow = (struct p54_tx_control_xbow_synth *)skb_put(skb, sizeof(*xbow));
+ xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
xbow->magic1 = cpu_to_le16(0x1);
xbow->magic2 = cpu_to_le16(0x2);
xbow->freq = cpu_to_le16(5390);
*/
dev->max_rates = 4;
dev->max_rate_tries = 7;
- dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
- sizeof(struct p54_tx_control_allocdata);
+ dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
+ sizeof(struct p54_tx_data);
mutex_init(&priv->conf_mutex);
init_completion(&priv->eeprom_comp);
__le16 top_compat;
} __attribute__((packed));
+#define BR_DESC_PRIV_CAP_WEP BIT(0)
+#define BR_DESC_PRIV_CAP_TKIP BIT(1)
+#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
+#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
+#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
+#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
+
struct bootrec_desc {
__le16 modes;
__le16 flags;
__le32 rx_end;
u8 headroom;
u8 tailroom;
- u8 unimportant[6];
+ u8 tx_queues;
+ u8 tx_depth;
+ u8 privacy_caps;
+ u8 rx_keycache_size;
+ u8 time_size;
+ u8 padding;
u8 rates[16];
u8 padding2[4];
__le16 rx_mtu;
#define BR_CODE_END_OF_BRA 0xFF0000FF
#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
+#define P54_HDR_FLAG_CONTROL BIT(15)
+#define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
+
+#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
+#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
+#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
+#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
+#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
+#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
+#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
+#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
+#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
+#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
+#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
+#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
+#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
+
+#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
+#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
+#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
+#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
+#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
+#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
+#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
+#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
+#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
+#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
+
/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
struct pda_entry {
u8 data[0];
} __attribute__ ((packed));
-struct p54_rx_hdr {
- __le16 magic;
+enum p54_rx_decrypt_status {
+ P54_DECRYPT_NONE = 0,
+ P54_DECRYPT_OK,
+ P54_DECRYPT_NOKEY,
+ P54_DECRYPT_NOMICHAEL,
+ P54_DECRYPT_NOCKIPMIC,
+ P54_DECRYPT_FAIL_WEP,
+ P54_DECRYPT_FAIL_TKIP,
+ P54_DECRYPT_FAIL_MICAHEL,
+ P54_DECRYPT_FAIL_CKIPKP,
+ P54_DECRYPT_FAIL_CKIPMIC,
+ P54_DECRYPT_FAIL_AESCCMP
+};
+
+struct p54_rx_data {
+ __le16 flags;
__le16 len;
__le16 freq;
u8 antenna;
u8 rate;
u8 rssi;
u8 quality;
- u16 unknown2;
+ u8 decrypt_status;
+ u8 rssi_raw;
__le32 tsf32;
__le32 unalloc0;
u8 align[0];
} __attribute__ ((packed));
-struct p54_frame_sent_hdr {
+enum p54_trap_type {
+ P54_TRAP_SCAN = 0,
+ P54_TRAP_TIMER,
+ P54_TRAP_BEACON_TX,
+ P54_TRAP_FAA_RADIO_ON,
+ P54_TRAP_FAA_RADIO_OFF,
+ P54_TRAP_RADAR,
+ P54_TRAP_NO_BEACON,
+ P54_TRAP_TBTT,
+ P54_TRAP_SCO_ENTER,
+ P54_TRAP_SCO_EXIT
+};
+
+struct p54_trap {
+ __le16 event;
+ __le16 frequency;
+} __attribute__ ((packed));
+
+enum p54_frame_sent_status {
+ P54_TX_OK = 0,
+ P54_TX_FAILED,
+ P54_TX_PSM,
+ P54_TX_PSM_CANCELLED
+};
+
+struct p54_frame_sent {
u8 status;
- u8 retries;
- __le16 ack_rssi;
+ u8 tries;
+ u8 ack_rssi;
+ u8 quality;
__le16 seq;
- u16 rate;
+ u8 antenna;
+ u8 padding;
} __attribute__ ((packed));
-struct p54_tx_control_allocdata {
+enum p54_tx_data_crypt {
+ P54_CRYPTO_NONE = 0,
+ P54_CRYPTO_WEP,
+ P54_CRYPTO_TKIP,
+ P54_CRYPTO_TKIPMICHAEL,
+ P54_CRYPTO_CCX_WEPMIC,
+ P54_CRYPTO_CCX_KPMIC,
+ P54_CRYPTO_CCX_KP,
+ P54_CRYPTO_AESCCMP
+};
+
+struct p54_tx_data {
u8 rateset[8];
- u8 unalloc0[2];
+ u8 rts_rate_idx;
+ u8 crypt_offset;
u8 key_type;
u8 key_len;
u8 key[16];
u8 hw_queue;
- u8 unalloc1[9];
+ u8 backlog;
+ __le16 durations[4];
u8 tx_antenna;
u8 output_power;
u8 cts_rate;
u8 align[0];
} __attribute__ ((packed));
+#define P54_FILTER_TYPE_NONE 0
+#define P54_FILTER_TYPE_STATION BIT(0)
+#define P54_FILTER_TYPE_IBSS BIT(1)
+#define P54_FILTER_TYPE_AP BIT(2)
+#define P54_FILTER_TYPE_TRANSPARENT BIT(3)
+#define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
+#define P54_FILTER_TYPE_HIBERNATE BIT(5)
+#define P54_FILTER_TYPE_NOACK BIT(6)
+#define P54_FILTER_TYPE_RX_DISABLED BIT(7)
+
struct p54_setup_mac {
__le16 mac_mode;
u8 mac_addr[ETH_ALEN];
} __attribute__ ((packed));
} __attribute__ ((packed));
-struct p54_tx_control_channel {
- __le16 flags;
+#define P54_SETUP_V1_LEN 40
+#define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
+
+#define P54_SCAN_EXIT BIT(0)
+#define P54_SCAN_TRAP BIT(1)
+#define P54_SCAN_ACTIVE BIT(2)
+#define P54_SCAN_FILTER BIT(3)
+
+struct p54_scan {
+ __le16 mode;
__le16 dwell;
u8 padding1[20];
struct pda_iq_autocal_entry iq_autocal;
struct {
__le32 basic_rate_mask;
- u8 rts_rates[8];
+ u8 rts_rates[8];
__le16 rssical_mul;
__le16 rssical_add;
} v2 __attribute__ ((packed));
} __attribute__ ((packed));
} __attribute__ ((packed));
-#define P54_TX_CONTROL_CHANNEL_V1_LEN (sizeof(struct p54_tx_control_channel)-12)
-#define P54_TX_CONTROL_CHANNEL_V2_LEN (sizeof(struct p54_tx_control_channel))
+#define P54_SCAN_V1_LEN (sizeof(struct p54_scan)-12)
+#define P54_SCAN_V2_LEN (sizeof(struct p54_scan))
-struct p54_tx_control_led {
+struct p54_led {
__le16 mode;
__le16 led_temporary;
__le16 led_permanent;
__le32 tsf32;
__le32 airtime;
__le32 noise;
- __le32 unkn[10]; /* CCE / CCA / RADAR */
+ __le32 sample_noise[8];
+ __le32 sample_cca;
+ __le32 sample_tx;
} __attribute__ ((packed));
-struct p54_tx_control_xbow_synth {
+struct p54_xbow_synth {
__le16 magic1;
__le16 magic2;
__le16 freq;
u32 padding[5];
} __attribute__ ((packed));
+struct p54_timer {
+ __le32 interval;
+} __attribute__ ((packed));
+
+struct p54_keycache {
+ u8 entry;
+ u8 key_id;
+ u8 mac[ETH_ALEN];
+ u8 padding[2];
+ u8 key_type;
+ u8 key_len;
+ u8 key[24];
+} __attribute__ ((packed));
+
+struct p54_burst {
+ u8 flags;
+ u8 queue;
+ u8 backlog;
+ u8 pad;
+ __le16 durations[32];
+} __attribute__ ((packed));
+
+struct p54_psm_interval {
+ __le16 interval;
+ __le16 periods;
+} __attribute__ ((packed));
+
+#define P54_PSM BIT(0)
+#define P54_PSM_DTIM BIT(1)
+#define P54_PSM_MCBC BIT(2)
+#define P54_PSM_CHECKSUM BIT(3)
+#define P54_PSM_SKIP_MORE_DATA BIT(4)
+#define P54_PSM_BEACON_TIMEOUT BIT(5)
+#define P54_PSM_HFOSLEEP BIT(6)
+#define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
+#define P54_PSM_LPIT BIT(8)
+#define P54_PSM_BF_UCAST_SKIP BIT(9)
+#define P54_PSM_BF_MCAST_SKIP BIT(10)
+
+struct p54_psm {
+ __le16 mode;
+ __le16 aid;
+ struct p54_psm_interval intervals[4];
+ u8 beacon_rssi_skip_max;
+ u8 rssi_delta_threshold;
+ u8 nr;
+ u8 exclude[1];
+} __attribute__ ((packed));
+
+#define MC_FILTER_ADDRESS_NUM 4
+
+struct p54_group_address_table {
+ __le16 filter_enable;
+ __le16 num_address;
+ u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
+} __attribute__ ((packed));
+
+struct p54_txcancel {
+ __le32 req_id;
+} __attribute__ ((packed));
+
+struct p54_sta_unlock {
+ u8 addr[ETH_ALEN];
+ u16 padding;
+} __attribute__ ((packed));
+
+#define P54_TIM_CLEAR BIT(15)
+struct p54_tx_control_tim {
+ u8 count;
+ u8 padding[3];
+ __le16 entry[8];
+} __attribute__ ((packed));
+
+struct p54_cce_quiet {
+ __le32 period;
+} __attribute__ ((packed));
+
+struct p54_bt_balancer {
+ __le16 prio_thresh;
+ __le16 acl_thresh;
+} __attribute__ ((packed));
+
+struct p54_arp_table {
+ __le16 filter_enable;
+ u8 ipv4_addr[4];
+} __attribute__ ((packed));
+
#endif /* P54COMMON_H */