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MIPS: MT: define write_c0_tchalt macro
author
Paul Burton
<paul.burton@imgtec.com>
Sun, 16 Mar 2014 16:21:34 +0000
(16:21 +0000)
committer
Paul Burton
<paul.burton@imgtec.com>
Wed, 28 May 2014 15:20:22 +0000
(16:20 +0100)
Define a macro to write to the current TCs TCHalt register. This will be
used by a subsequent patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
arch/mips/include/asm/mipsmtregs.h
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diff --git
a/arch/mips/include/asm/mipsmtregs.h
b/arch/mips/include/asm/mipsmtregs.h
index 6efa79a27b6a02e1fad11c60f5a801878f0d92a5..5f8052ce43bfb589096202eee3f7841194741f59 100644
(file)
--- a/
arch/mips/include/asm/mipsmtregs.h
+++ b/
arch/mips/include/asm/mipsmtregs.h
@@
-36,6
+36,8
@@
#define read_c0_tcbind() __read_32bit_c0_register($2, 2)
+#define write_c0_tchalt(val) __write_32bit_c0_register($2, 4, val)
+
#define read_c0_tccontext() __read_32bit_c0_register($2, 5)
#define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val)