KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler

Add a handler for reading the guest's view of the ICV_HPPIR1_EL1
register. This is a simple parsing of the available LRs, extracting the
highest available interrupt.

Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 563bba108442133ded920fdd54a6f523582916c9..0ce7f81dd47e64b35cf1914d9a3334ea29a3b945 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -185,6 +185,7 @@
 #define SYS_ICC_SGI1R_EL1              sys_reg(3, 0, 12, 11, 5)
 #define SYS_ICC_IAR1_EL1               sys_reg(3, 0, 12, 12, 0)
 #define SYS_ICC_EOIR1_EL1              sys_reg(3, 0, 12, 12, 1)
+#define SYS_ICC_HPPIR1_EL1             sys_reg(3, 0, 12, 12, 2)
 #define SYS_ICC_BPR1_EL1               sys_reg(3, 0, 12, 12, 3)
 #define SYS_ICC_CTLR_EL1               sys_reg(3, 0, 12, 12, 4)
 #define SYS_ICC_SRE_EL1                        sys_reg(3, 0, 12, 12, 5)

diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
index 1c85a6df22d9c88895a384f4173cb5f71b48ec0a..f031e8f088aee06291e22603af1f7dbd1a772602 100644 (file)
--- a/virt/kvm/arm/hyp/vgic-v3-sr.c
+++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
@@ -790,6 +790,26 @@ static void __hyp_text __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu,
        __vgic_v3_write_apxrn(vcpu, rt, 3);
 }
 
+static void __hyp_text __vgic_v3_read_hppir(struct kvm_vcpu *vcpu,
+                                           u32 vmcr, int rt)
+{
+       u64 lr_val;
+       int lr, lr_grp, grp;
+
+       grp = __vgic_v3_get_group(vcpu);
+
+       lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
+       if (lr == -1)
+               goto spurious;
+
+       lr_grp = !!(lr_val & ICH_LR_GROUP);
+       if (lr_grp != grp)
+               lr_val = ICC_IAR1_EL1_SPURIOUS;
+
+spurious:
+       vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);
+}
+
 int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
 {
        int rt;
@@ -854,6 +874,9 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
                else
                        fn = __vgic_v3_write_apxr3;
                break;
+       case SYS_ICC_HPPIR1_EL1:
+               fn = __vgic_v3_read_hppir;
+               break;
        default:
                return 0;
        }