-/*
- * Agere Systems Inc.
+/* Agere Systems Inc.
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
*
* Copyright © 2005 Agere Systems Inc.
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
- *
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */
/* ISR defines */
-/*
- * For interrupts, normal running is:
+/* For interrupts, normal running is:
* rxdma_xfr_done, phy_interrupt, mac_stat_interrupt,
* watchdog_interrupt & txdma_xfer_done
*
/* Typedefs for the RX DMA status word */
-/*
- * rx status word 0 holds part of the status bits of the Rx DMA engine
+/* rx status word 0 holds part of the status bits of the Rx DMA engine
* that get copied out to memory by the ET-1310. Word 0 is a 32 bit word
* which contains the Free Buffer ring 0 and 1 available offset.
*
* bit 26 Wrap flag for FBR0
*/
-/*
- * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine
+/* RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine
* that get copied out to memory by the ET-1310. Word 3 is a 32 bit word
* which contains the Packet Status Ring available offset.
*
* bit 29-31 unused
*/
-/*
- * struct rx_status_block is a structure representing the status of the Rx
+/* struct rx_status_block is a structure representing the status of the Rx
* DMA engine it sits in free memory, and is pointed to by 0x101c / 0x1020
*/
struct rx_status_block {
u32 word1;
};
-/*
- * Structure for look-up table holding free buffer ring pointers, addresses
+/* Structure for look-up table holding free buffer ring pointers, addresses
* and state.
*/
struct fbr_lookup {
dma_addr_t buffsize;
};
-/*
- * struct rx_ring is the sructure representing the adaptor's local
+/* struct rx_ring is the sructure representing the adaptor's local
* reference(s) to the rings
*/
struct rx_ring {
};
/* TX defines */
-/*
- * word 2 of the control bits in the Tx Descriptor ring for the ET-1310
+/* word 2 of the control bits in the Tx Descriptor ring for the ET-1310
*
* 0-15: length of packet
* 16-27: VLAN tag
u32 flags; /* data (detailed above) */
};
-/*
- * The status of the Tx DMA engine it sits in free memory, and is pointed to
+/* The status of the Tx DMA engine it sits in free memory, and is pointed to
* by 0x101c / 0x1020. This is a DMA10 type
*/
int since_irq;
};
-/*
- * Do not change these values: if changed, then change also in respective
+/* Do not change these values: if changed, then change also in respective
* TXdma and Rxdma engines
*/
#define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
#define NUM_TCB 64
-/*
- * These values are all superseded by registry entries to facilitate tuning.
+/* These values are all superseded by registry entries to facilitate tuning.
* Once the desired performance has been achieved, the optimal registry values
* should be re-populated to these #defines:
*/
u32 reg;
int i;
- /*
- * 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and
+ /* 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and
* bits 7,1:0 both equal to 1, at least once after reset.
* Subsequent operations need only to check that bits 1:0 are equal
* to 1 prior to starting a single byte read/write
return -ETIMEDOUT;
}
-/**
- * eeprom_write - Write a byte to the ET1310's EEPROM
+/* eeprom_write - Write a byte to the ET1310's EEPROM
* @adapter: pointer to our private adapter structure
* @addr: the address to write
* @data: the value to write
u32 status;
u32 val = 0;
- /*
- * For an EEPROM, an I2C single byte write is defined as a START
+ /* For an EEPROM, an I2C single byte write is defined as a START
* condition followed by the device address, EEPROM address, one byte
* of data and a STOP condition. The STOP condition will trigger the
* EEPROM's internally timed write cycle to the nonvolatile memory.
if (err)
return err;
- /*
- * 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0,
- * and bits 1:0 both =0. Bit 5 should be set according to the
- * type of EEPROM being accessed (1=two byte addressing, 0=one
- * byte addressing).
- */
+ /* 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0,
+ * and bits 1:0 both =0. Bit 5 should be set according to the
+ * type of EEPROM being accessed (1=two byte addressing, 0=one
+ * byte addressing).
+ */
if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER,
LBCIF_CONTROL_LBCIF_ENABLE | LBCIF_CONTROL_I2C_WRITE))
return -EIO;
/* Write the address to the LBCIF Address Register */
if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER, addr))
break;
- /*
- * Write the data to the LBCIF Data Register (the I2C write
+ /* Write the data to the LBCIF Data Register (the I2C write
* will begin).
*/
if (pci_write_config_byte(pdev, LBCIF_DATA_REGISTER, data))
break;
- /*
- * Monitor bit 1:0 of the LBCIF Status Register. When bits
+ /* Monitor bit 1:0 of the LBCIF Status Register. When bits
* 1:0 are both equal to 1, the I2C write has completed and the
* internal write cycle of the EEPROM is about to start.
* (bits 1:0 = 01 is a legal state while waiting from both
if (err < 0)
return 0;
- /*
- * Check bit 3 of the LBCIF Status Register. If equal to 1,
+ /* Check bit 3 of the LBCIF Status Register. If equal to 1,
* an error has occurred.Don't break here if we are revision
* 1, this is so we do a blind write for load bug.
*/
&& adapter->pdev->revision == 0)
break;
- /*
- * Check bit 2 of the LBCIF Status Register. If equal to 1 an
+ /* Check bit 2 of the LBCIF Status Register. If equal to 1 an
* ACK error has occurred on the address phase of the write.
* This could be due to an actual hardware failure or the
* EEPROM may still be in its internal write cycle from a
*repeated later.
*/
if (status & LBCIF_STATUS_ACK_ERROR) {
- /*
- * This could be due to an actual hardware failure
+ /* This could be due to an actual hardware failure
* or the EEPROM may still be in its internal write
* cycle from a previous write. This write operation
* was ignored and must be repeated later.
break;
}
- /*
- * Set bit 6 of the LBCIF Control Register = 0.
+ /* Set bit 6 of the LBCIF Control Register = 0.
*/
udelay(10);
return writeok ? 0 : -EIO;
}
-/**
- * eeprom_read - Read a byte from the ET1310's EEPROM
+/* eeprom_read - Read a byte from the ET1310's EEPROM
* @adapter: pointer to our private adapter structure
* @addr: the address from which to read
* @pdata: a pointer to a byte in which to store the value of the read
int err;
u32 status;
- /*
- * A single byte read is similar to the single byte write, with the
+ /* A single byte read is similar to the single byte write, with the
* exception of the data flow:
*/
err = eeprom_wait_ready(pdev, NULL);
if (err)
return err;
- /*
- * Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0,
+ /* Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0,
* and bits 1:0 both =0. Bit 5 should be set according to the type
* of EEPROM being accessed (1=two byte addressing, 0=one byte
* addressing).
if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER,
LBCIF_CONTROL_LBCIF_ENABLE))
return -EIO;
- /*
- * Write the address to the LBCIF Address Register (I2C read will
+ /* Write the address to the LBCIF Address Register (I2C read will
* begin).
*/
if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER, addr))
return -EIO;
- /*
- * Monitor bit 0 of the LBCIF Status Register. When = 1, I2C read
+ /* Monitor bit 0 of the LBCIF Status Register. When = 1, I2C read
* is complete. (if bit 1 =1 and bit 0 stays = 0, a hardware failure
* has occurred).
*/
err = eeprom_wait_ready(pdev, &status);
if (err < 0)
return err;
- /*
- * Regardless of error status, read data byte from LBCIF Data
+ /* Regardless of error status, read data byte from LBCIF Data
* Register.
*/
*pdata = err;
- /*
- * Check bit 2 of the LBCIF Status Register. If = 1,
+ /* Check bit 2 of the LBCIF Status Register. If = 1,
* then an error has occurred.
*/
return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0;
return 0;
}
-/**
- * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310.
+/* et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310.
* @adapter: pointer to our adapter structure
*/
static void et131x_rx_dma_enable(struct et131x_adapter *adapter)
}
}
-/**
- * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
+/* et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
* @adapter: pointer to our adapter structure
*/
static void et131x_rx_dma_disable(struct et131x_adapter *adapter)
}
}
-/**
- * et131x_tx_dma_enable - re-start of Tx_DMA on the ET1310.
+/* et131x_tx_dma_enable - re-start of Tx_DMA on the ET1310.
* @adapter: pointer to our adapter structure
*
* Mainly used after a return to the D0 (full-power) state from a lower state.
*v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP);
}
-/**
- * et1310_config_mac_regs1 - Initialize the first part of MAC regs
+/* et1310_config_mac_regs1 - Initialize the first part of MAC regs
* @adapter: pointer to our adapter structure
*/
static void et1310_config_mac_regs1(struct et131x_adapter *adapter)
writel(0, ¯egs->cfg1);
}
-/**
- * et1310_config_mac_regs2 - Initialize the second part of MAC regs
+/* et1310_config_mac_regs2 - Initialize the second part of MAC regs
* @adapter: pointer to our adapter structure
*/
static void et1310_config_mac_regs2(struct et131x_adapter *adapter)
/* Now we need to initialize the MAC Configuration 2 register */
/* preamble 7, check length, huge frame off, pad crc, crc enable
- full duplex off */
+ * full duplex off
+ */
cfg2 |= 0x7 << ET_MAC_CFG2_PREAMBLE_SHIFT;
cfg2 |= ET_MAC_CFG2_IFMODE_LEN_CHECK;
cfg2 |= ET_MAC_CFG2_IFMODE_PAD_CRC;
}
}
-/**
- * et1310_in_phy_coma - check if the device is in phy coma
+/* et1310_in_phy_coma - check if the device is in phy coma
* @adapter: pointer to our adapter structure
*
* Returns 0 if the device is not in phy coma, 1 if it is in phy coma
writel(0xFFFE7E8B, &macstat->carry_reg2_mask);
}
-/**
- * et131x_phy_mii_read - Read from the PHY through the MII Interface on the MAC
+/* et131x_phy_mii_read - Read from the PHY through the MII Interface on the MAC
* @adapter: pointer to our private adapter structure
* @addr: the address of the transceiver
* @reg: the register to read
}
/* If we hit here we were able to read the register and we need to
- * return the value to the caller */
+ * return the value to the caller
+ */
*value = readl(&mac->mii_mgmt_stat) & ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK;
/* Stop the read operation */
return et131x_phy_mii_read(adapter, phydev->addr, reg, value);
}
-/**
- * et131x_mii_write - Write to a PHY register through the MII interface of the MAC
+/* et131x_mii_write - Write to a PHY reg through the MII interface of the MAC
* @adapter: pointer to our private adapter structure
* @reg: the register to read
* @value: 16-bit value to write
/* Stop the write operation */
writel(0, &mac->mii_mgmt_cmd);
- /*
- * set the registers we touched back to the state at which we entered
+ /* set the registers we touched back to the state at which we entered
* this function
*/
writel(mii_addr, &mac->mii_mgmt_addr);
(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
adapter->flowcontrol = FLOW_NONE;
} else {/* if (remote_pause == TRUEPHY_CLEAR_BIT &&
- remote_async_pause == TRUEPHY_SET_BIT) */
+ * remote_async_pause == TRUEPHY_SET_BIT)
+ */
if (adapter->wanted_flow == FLOW_BOTH)
adapter->flowcontrol = FLOW_RXONLY;
else
}
}
-/**
- * et1310_update_macstat_host_counters - Update the local copy of the statistics
+/* et1310_update_macstat_host_counters - Update the local copy of the statistics
* @adapter: pointer to the adapter structure
*/
static void et1310_update_macstat_host_counters(struct et131x_adapter *adapter)
stats->rx_other_errs += readl(&macstat->rx_fragment_packets);
}
-/**
- * et1310_handle_macstat_interrupt
+/* et1310_handle_macstat_interrupt
* @adapter: pointer to the adapter structure
*
* One of the MACSTAT counters has wrapped. Update the local copy of
return 0;
}
-/**
- * et1310_phy_power_down - PHY power control
+/* et1310_phy_power_down - PHY power control
* @adapter: device to control
* @down: true for off/false for back on
*
et131x_mii_write(adapter, MII_BMCR, data);
}
-/**
- * et131x_xcvr_init - Init the phy if we are setting it into force mode
+/* et131x_xcvr_init - Init the phy if we are setting it into force mode
* @adapter: pointer to our private adapter structure
*
*/
}
}
-/**
- * et131x_configure_global_regs - configure JAGCore global regs
+/* et131x_configure_global_regs - configure JAGCore global regs
* @adapter: pointer to our adapter structure
*
* Used to configure the global registers on the JAGCore
writel(0, ®s->watchdog_timer);
}
-/**
- * et131x_config_rx_dma_regs - Start of Rx_DMA init sequence
+/* et131x_config_rx_dma_regs - Start of Rx_DMA init sequence
* @adapter: pointer to our adapter structure
*/
static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
spin_unlock_irqrestore(&adapter->rcv_lock, flags);
}
-/**
- * et131x_config_tx_dma_regs - Set up the tx dma section of the JAGCore.
+/* et131x_config_tx_dma_regs - Set up the tx dma section of the JAGCore.
* @adapter: pointer to our private adapter structure
*
* Configure the transmit engine with the ring buffers we have created
adapter->tx_ring.send_idx = 0;
}
-/**
- * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
+/* et131x_adapter_setup - Set the adapter up as per cassini+ documentation
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success, errno on failure (as defined in errno.h)
et131x_xcvr_init(adapter);
}
-/**
- * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
+/* et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
* @adapter: pointer to our private adapter structure
*/
static void et131x_soft_reset(struct et131x_adapter *adapter)
writel(0, &adapter->regs->mac.cfg1);
}
-/**
- * et131x_enable_interrupts - enable interrupt
+/* et131x_enable_interrupts - enable interrupt
* @adapter: et131x device
*
* Enable the appropriate interrupts on the ET131x according to our
writel(mask, &adapter->regs->global.int_mask);
}
-/**
- * et131x_disable_interrupts - interrupt disable
+/* et131x_disable_interrupts - interrupt disable
* @adapter: et131x device
*
* Block all interrupts from the et131x device at the device itself
writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask);
}
-/**
- * et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310
+/* et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310
* @adapter: pointer to our adapter structure
*/
static void et131x_tx_dma_disable(struct et131x_adapter *adapter)
&adapter->regs->txdma.csr);
}
-/**
- * et131x_enable_txrx - Enable tx/rx queues
+/* et131x_enable_txrx - Enable tx/rx queues
* @netdev: device to be enabled
*/
static void et131x_enable_txrx(struct net_device *netdev)
netif_start_queue(netdev);
}
-/**
- * et131x_disable_txrx - Disable tx/rx queues
+/* et131x_disable_txrx - Disable tx/rx queues
* @netdev: device to be disabled
*/
static void et131x_disable_txrx(struct net_device *netdev)
et131x_disable_interrupts(adapter);
}
-/**
- * et131x_init_send - Initialize send data structures
+/* et131x_init_send - Initialize send data structures
* @adapter: pointer to our private adapter structure
*/
static void et131x_init_send(struct et131x_adapter *adapter)
tx_ring->send_tail = NULL;
}
-/**
- * et1310_enable_phy_coma - called when network cable is unplugged
+/* et1310_enable_phy_coma - called when network cable is unplugged
* @adapter: pointer to our adapter structure
*
* driver receive an phy status change interrupt while in D0 and check that
/* Save the GbE PHY speed and duplex modes. Need to restore this
* when cable is plugged back in
*/
- /*
- * TODO - when PM is re-enabled, check if we need to
+ /* TODO - when PM is re-enabled, check if we need to
* perform a similar task as this -
* adapter->pdown_speed = adapter->ai_force_speed;
* adapter->pdown_duplex = adapter->ai_force_duplex;
writel(pmcsr, &adapter->regs->global.pm_csr);
}
-/**
- * et1310_disable_phy_coma - Disable the Phy Coma Mode
+/* et1310_disable_phy_coma - Disable the Phy Coma Mode
* @adapter: pointer to our adapter structure
*/
static void et1310_disable_phy_coma(struct et131x_adapter *adapter)
u32 tmp_free_buff_ring = *free_buff_ring;
tmp_free_buff_ring++;
/* This works for all cases where limit < 1024. The 1023 case
- works because 1023++ is 1024 which means the if condition is not
- taken but the carry of the bit into the wrap bit toggles the wrap
- value correctly */
+ * works because 1023++ is 1024 which means the if condition is not
+ * taken but the carry of the bit into the wrap bit toggles the wrap
+ * value correctly
+ */
if ((tmp_free_buff_ring & ET_DMA10_MASK) > limit) {
tmp_free_buff_ring &= ~ET_DMA10_MASK;
tmp_free_buff_ring ^= ET_DMA10_WRAP;
return tmp_free_buff_ring;
}
-/**
- * et131x_rx_dma_memory_alloc
+/* et131x_rx_dma_memory_alloc
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success and errno on failure (as defined in errno.h)
pr_info("Packet Status Ring %llx\n",
(unsigned long long) rx_ring->ps_ring_physaddr);
- /*
- * NOTE : dma_alloc_coherent(), used above to alloc DMA regions,
+ /* NOTE : dma_alloc_coherent(), used above to alloc DMA regions,
* ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
* are ever returned, make sure the high part is retrieved here before
* storing the adjusted address.
return 0;
}
-/**
- * et131x_rx_dma_memory_free - Free all memory allocated within this module.
+/* et131x_rx_dma_memory_free - Free all memory allocated within this module.
* @adapter: pointer to our private adapter structure
*/
static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
rx_ring->num_ready_recv = 0;
}
-/**
- * et131x_init_recv - Initialize receive data structures.
+/* et131x_init_recv - Initialize receive data structures.
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success and errno on failure (as defined in errno.h)
return 0;
}
-/**
- * et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate.
+/* et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate.
* @adapter: pointer to our adapter structure
*/
static void et131x_set_rx_dma_timer(struct et131x_adapter *adapter)
}
}
-/**
- * NICReturnRFD - Recycle a RFD and put it back onto the receive list
+/* NICReturnRFD - Recycle a RFD and put it back onto the receive list
* @adapter: pointer to our adapter
* @rfd: pointer to the RFD
*/
WARN_ON(rx_local->num_ready_recv > rx_local->num_rfd);
}
-/**
- * nic_rx_pkts - Checks the hardware for available packets
+/* nic_rx_pkts - Checks the hardware for available packets
* @adapter: pointer to our adapter
*
* Returns rfd, a pointer to our MPRFD.
return rfd;
}
-/**
- * et131x_handle_recv_interrupt - Interrupt handler for receive processing
+/* et131x_handle_recv_interrupt - Interrupt handler for receive processing
* @adapter: pointer to our adapter
*
* Assumption, Rcv spinlock has been acquired.
adapter->rx_ring.unfinished_receives = false;
}
-/**
- * et131x_tx_dma_memory_alloc
+/* et131x_tx_dma_memory_alloc
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success and errno on failure (as defined in errno.h).
return 0;
}
-/**
- * et131x_tx_dma_memory_free - Free all memory allocated within this module
+/* et131x_tx_dma_memory_free - Free all memory allocated within this module
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success and errno on failure (as defined in errno.h).
kfree(adapter->tx_ring.tcb_ring);
}
-/**
- * nic_send_packet - NIC specific send handler for version B silicon.
+/* nic_send_packet - NIC specific send handler for version B silicon.
* @adapter: pointer to our adapter
* @tcb: pointer to struct tcb
*
*/
if (skb_headlen(skb) <= 1514) {
/* Low 16bits are length, high is vlan and
- unused currently so zero */
+ * unused currently so zero
+ */
desc[frag].len_vlan = skb_headlen(skb);
dma_addr = dma_map_single(&adapter->pdev->dev,
skb->data,
return 0;
}
-/**
- * send_packet - Do the work to send a packet
+/* send_packet - Do the work to send a packet
* @skb: the packet(s) to send
* @adapter: a pointer to the device's private adapter structure
*
return 0;
}
-/**
- * et131x_send_packets - This function is called by the OS to send packets
+/* et131x_send_packets - This function is called by the OS to send packets
* @skb: the packet(s) to send
* @netdev:device on which to TX the above packet(s)
*
return status;
}
-/**
- * free_send_packet - Recycle a struct tcb
+/* free_send_packet - Recycle a struct tcb
* @adapter: pointer to our adapter
* @tcb: pointer to struct tcb
*
WARN_ON(adapter->tx_ring.used < 0);
}
-/**
- * et131x_free_busy_send_packets - Free and complete the stopped active sends
+/* et131x_free_busy_send_packets - Free and complete the stopped active sends
* @adapter: pointer to our adapter
*
* Assumption - Send spinlock has been acquired
adapter->tx_ring.used = 0;
}
-/**
- * et131x_handle_send_interrupt - Interrupt handler for sending processing
+/* et131x_handle_send_interrupt - Interrupt handler for sending processing
* @adapter: pointer to our adapter
*
* Re-claim the send resources, complete sends and get more to send from
.get_regs = et131x_get_regs,
.get_link = ethtool_op_get_link,
};
-/**
- * et131x_hwaddr_init - set up the MAC Address on the ET1310
+
+/* et131x_hwaddr_init - set up the MAC Address on the ET1310
* @adapter: pointer to our private adapter structure
*/
static void et131x_hwaddr_init(struct et131x_adapter *adapter)
* device
*/
if (is_zero_ether_addr(adapter->rom_addr)) {
- /*
- * We need to randomly generate the last octet so we
+ /* We need to randomly generate the last octet so we
* decrease our chances of setting the mac address to
* same as another one of our cards in the system
*/
get_random_bytes(&adapter->addr[5], 1);
- /*
- * We have the default value in the register we are
+ /* We have the default value in the register we are
* working with so we need to copy the current
* address into the permanent address
*/
}
}
-/**
- * et131x_pci_init - initial PCI setup
+/* et131x_pci_init - initial PCI setup
* @adapter: pointer to our private adapter structure
* @pdev: our PCI device
*
goto out;
}
-/**
- * et131x_error_timer_handler
+/* et131x_error_timer_handler
* @data: timer-specific variable; here a pointer to our adapter structure
*
* The routine called when the error timer expires, to track the number of
if (et1310_in_phy_coma(adapter)) {
/* Bring the device immediately out of coma, to
* prevent it from sleeping indefinitely, this
- * mechanism could be improved! */
+ * mechanism could be improved!
+ */
et1310_disable_phy_coma(adapter);
adapter->boot_coma = 20;
} else {
mod_timer(&adapter->error_timer, jiffies + TX_ERROR_PERIOD * HZ / 1000);
}
-/**
- * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
+/* et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
* @adapter: pointer to our private adapter structure
*/
static void et131x_adapter_memory_free(struct et131x_adapter *adapter)
et131x_rx_dma_memory_free(adapter);
}
-/**
- * et131x_adapter_memory_alloc
+/* et131x_adapter_memory_alloc
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success, errno on failure (as defined in errno.h).
struct phy_device *phydev = adapter->phydev;
if (phydev && phydev->link != adapter->link) {
- /*
- * Check to see if we are in coma mode and if
+ /* Check to see if we are in coma mode and if
* so, disable it because we will not be able
* to read PHY values until we are out.
*/
if (phydev->link) {
adapter->boot_coma = 20;
if (phydev && phydev->speed == SPEED_10) {
- /*
- * NOTE - Is there a way to query this without
+ /* NOTE - Is there a way to query this without
* TruePHY?
* && TRU_QueryCoreType(adapter->hTruePhy, 0)==
* EMI_TRUEPHY_A13O) {
/* Re-initialize the send structures */
et131x_init_send(adapter);
- /*
- * Bring the device back to the state it was during
+ /* Bring the device back to the state it was during
* init prior to autonegotiation being complete. This
* way, when we get the auto-neg complete interrupt,
* we can complete init by calling config_mac_regs2.
}
phydev = phy_connect(netdev, dev_name(&phydev->dev),
- &et131x_adjust_link, 0, PHY_INTERFACE_MODE_MII);
+ &et131x_adjust_link, 0, PHY_INTERFACE_MODE_MII);
if (IS_ERR(phydev)) {
dev_err(&adapter->pdev->dev, "Could not attach to PHY\n");
return 0;
}
-/**
- * et131x_adapter_init
+/* et131x_adapter_init
* @adapter: pointer to the private adapter struct
* @pdev: pointer to the PCI device
*
return adapter;
}
-/**
- * et131x_pci_remove
+/* et131x_pci_remove
* @pdev: a pointer to the device's pci_dev structure
*
* Registered in the pci_driver structure, this function is called when the
pci_disable_device(pdev);
}
-/**
- * et131x_up - Bring up a device for use.
+/* et131x_up - Bring up a device for use.
* @netdev: device to be opened
*/
static void et131x_up(struct net_device *netdev)
phy_start(adapter->phydev);
}
-/**
- * et131x_down - Bring down the device
+/* et131x_down - Bring down the device
* @netdev: device to be brought down
*/
static void et131x_down(struct net_device *netdev)
#define ET131X_PM_OPS NULL
#endif
-/**
- * et131x_isr - The Interrupt Service Routine for the driver.
+/* et131x_isr - The Interrupt Service Routine for the driver.
* @irq: the IRQ on which the interrupt was received.
* @dev_id: device-specific info (here a pointer to a net_device struct)
*
return IRQ_RETVAL(handled);
}
-/**
- * et131x_isr_handler - The ISR handler
+/* et131x_isr_handler - The ISR handler
* @p_adapter, a pointer to the device's private adapter structure
*
* scheduled to run in a deferred context by the ISR. This is where the ISR's
u32 status = adapter->stats.interrupt_status;
struct address_map __iomem *iomem = adapter->regs;
- /*
- * These first two are by far the most common. Once handled, we clear
+ /* These first two are by far the most common. Once handled, we clear
* their two bits in the status word. If the word is now zero, we
* exit.
*/
/* Handle Free Buffer Ring 0 and 1 Low interrupt */
if (status & (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
- /*
- * This indicates the number of unused buffers in RXDMA free
+ /* This indicates the number of unused buffers in RXDMA free
* buffer ring 0 is <= the limit you programmed. Free buffer
* resources need to be returned. Free buffers are consumed as
* packets are passed from the network to the host. The host
* method of returning resources.
*/
- /*
- * If the user has flow control on, then we will
+ /* If the user has flow control on, then we will
* send a pause packet, otherwise just exit
*/
if (adapter->flowcontrol == FLOW_TXONLY ||
adapter->flowcontrol == FLOW_BOTH) {
u32 pm_csr;
- /*
- * Tell the device to send a pause packet via the back
+ /* Tell the device to send a pause packet via the back
* pressure register (bp req and bp xon/xoff)
*/
pm_csr = readl(&iomem->global.pm_csr);
/* Handle Packet Status Ring Low Interrupt */
if (status & ET_INTR_RXDMA_STAT_LOW) {
- /*
- * Same idea as with the two Free Buffer Rings. Packets going
+ /* Same idea as with the two Free Buffer Rings. Packets going
* from the network to the host each consume a free buffer
* resource and a packet status resource. These resoures are
* passed to the OS. When the OS is done with the resources,
/* Handle RXDMA Error Interrupt */
if (status & ET_INTR_RXDMA_ERR) {
- /*
- * The rxdma_error interrupt is sent when a time-out on a
+ /* The rxdma_error interrupt is sent when a time-out on a
* request issued by the JAGCore has occurred or a completion is
* returned with an un-successful status. In both cases the
* request is considered complete. The JAGCore will
/* Handle the Wake on LAN Event */
if (status & ET_INTR_WOL) {
- /*
- * This is a secondary interrupt for wake on LAN. The driver
+ /* This is a secondary interrupt for wake on LAN. The driver
* should never see this, if it does, something serious is
* wrong. We will TRAP the message when we are in DBG mode,
* otherwise we will ignore it.
if (status & ET_INTR_TXMAC) {
u32 err = readl(&iomem->txmac.err);
- /*
- * When any of the errors occur and TXMAC generates an
+ /* When any of the errors occur and TXMAC generates an
* interrupt to report these errors, it usually means that
* TXMAC has detected an error in the data stream retrieved
* from the on-chip Tx Q. All of these errors are catastrophic
"TXMAC interrupt, error 0x%08x\n",
err);
- /*
- * If we are debugging, we want to see this error, otherwise we
+ /* If we are debugging, we want to see this error, otherwise we
* just want the device to be reset and continue
*/
}
/* Handle RXMAC Interrupt */
if (status & ET_INTR_RXMAC) {
- /*
- * These interrupts are catastrophic to the device, what we need
+ /* These interrupts are catastrophic to the device, what we need
* to do is disable the interrupts and set the flag to cause us
* to reset so we can solve this issue.
*/
readl(&iomem->rxmac.ctrl),
readl(&iomem->rxmac.rxq_diag));
- /*
- * If we are debugging, we want to see this error, otherwise we
+ /* If we are debugging, we want to see this error, otherwise we
* just want the device to be reset and continue
*/
}
/* Handle MAC_STAT Interrupt */
if (status & ET_INTR_MAC_STAT) {
- /*
- * This means at least one of the un-masked counters in the
+ /* This means at least one of the un-masked counters in the
* MAC_STAT block has rolled over. Use this to maintain the top,
* software managed bits of the counter(s).
*/
/* Handle SLV Timeout Interrupt */
if (status & ET_INTR_SLV_TIMEOUT) {
- /*
- * This means a timeout has occurred on a read or write request
+ /* This means a timeout has occurred on a read or write request
* to one of the JAGCore registers. The Global Resources block
* has terminated the request and on a read request, returned a
* "fake" value. The most likely reasons are: Bad Address or the
et131x_enable_interrupts(adapter);
}
-/**
- * et131x_stats - Return the current device statistics.
+/* et131x_stats - Return the current device statistics.
* @netdev: device whose stats are being queried
*
* Returns 0 on success, errno on failure (as defined in errno.h)
return stats;
}
-/**
- * et131x_open - Open the device for use.
+/* et131x_open - Open the device for use.
* @netdev: device to be opened
*
* Returns 0 on success, errno on failure (as defined in errno.h)
return result;
}
-/**
- * et131x_close - Close the device
+/* et131x_close - Close the device
* @netdev: device to be closed
*
* Returns 0 on success, errno on failure (as defined in errno.h)
return del_timer_sync(&adapter->error_timer);
}
-/**
- * et131x_ioctl - The I/O Control handler for the driver
+/* et131x_ioctl - The I/O Control handler for the driver
* @netdev: device on which the control request is being made
* @reqbuf: a pointer to the IOCTL request buffer
* @cmd: the IOCTL command code
return phy_mii_ioctl(adapter->phydev, reqbuf, cmd);
}
-/**
- * et131x_set_packet_filter - Configures the Rx Packet filtering on the device
+/* et131x_set_packet_filter - Configures the Rx Packet filtering on the device
* @adapter: pointer to our private adapter structure
*
* FIXME: lot of dups with MAC code
if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0)
pf_ctrl &= ~7; /* Clear filter bits */
else {
- /*
- * Set us up with Multicast packet filtering. Three cases are
+ /* Set us up with Multicast packet filtering. Three cases are
* possible - (1) we have a multi-cast list, (2) we receive ALL
* multicast entries or (3) we receive none.
*/
return status;
}
-/**
- * et131x_multicast - The handler to configure multicasting on the interface
+/* et131x_multicast - The handler to configure multicasting on the interface
* @netdev: a pointer to a net_device struct representing the device
*/
static void et131x_multicast(struct net_device *netdev)
spin_unlock_irqrestore(&adapter->lock, flags);
}
-/**
- * et131x_tx - The handler to tx a packet on the device
+/* et131x_tx - The handler to tx a packet on the device
* @skb: data to be Tx'd
* @netdev: device on which data is to be Tx'd
*
return status;
}
-/**
- * et131x_tx_timeout - Timeout handler
+/* et131x_tx_timeout - Timeout handler
* @netdev: a pointer to a net_device struct representing the device
*
* The handler called when a Tx request times out. The timeout period is
spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags);
}
-/**
- * et131x_change_mtu - The handler called to change the MTU for the device
+/* et131x_change_mtu - The handler called to change the MTU for the device
* @netdev: device whose MTU is to be changed
* @new_mtu: the desired MTU
*
return result;
}
-/**
- * et131x_set_mac_addr - handler to change the MAC address for the device
+/* et131x_set_mac_addr - handler to change the MAC address for the device
* @netdev: device whose MAC is to be changed
* @new_mac: the desired MAC address
*
.ndo_do_ioctl = et131x_ioctl,
};
-/**
- * et131x_pci_setup - Perform device initialization
+/* et131x_pci_setup - Perform device initialization
* @pdev: a pointer to the device's pci_dev structure
* @ent: this device's entry in the pci_device_id table
*
projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / commitdiff