ath9k_hw: remove MCI_STATE_CONT_* state
authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Tue, 12 Jun 2012 14:48:22 +0000 (20:18 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 13 Jun 2012 18:36:02 +0000 (14:36 -0400)
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_mci.c
drivers/net/wireless/ath/ath9k/ar9003_mci.h
drivers/net/wireless/ath/ath9k/mci.c
drivers/net/wireless/ath/ath9k/reg.h

index 1508500e73be7b1bd8e2e734e55b2649b624fc67..25f99ef48b200c165f9bff8e555d0250a78ed577 100644 (file)
@@ -1191,15 +1191,6 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type)
                           AR_MCI_RX_REMOTE_SLEEP) ?
                        MCI_BT_SLEEP : MCI_BT_AWAKE;
                break;
-       case MCI_STATE_CONT_RSSI_POWER:
-               value = MS(mci->cont_status, AR_MCI_CONT_RSSI_POWER);
-               break;
-       case MCI_STATE_CONT_PRIORITY:
-               value = MS(mci->cont_status, AR_MCI_CONT_RRIORITY);
-               break;
-       case MCI_STATE_CONT_TXRX:
-               value = MS(mci->cont_status, AR_MCI_CONT_TXRX);
-               break;
        case MCI_STATE_SET_BT_SLEEP:
                mci->bt_state = MCI_BT_SLEEP;
                break;
index 0c02bd86597b7044cf796f710375c1d8bd75f881..98bfc62d6b9bd6de9d796f4b88d9619efcc98c85 100644 (file)
@@ -195,9 +195,6 @@ enum mci_state_type {
        MCI_STATE_SET_BT_CAL,
        MCI_STATE_LAST_SCHD_MSG_OFFSET,
        MCI_STATE_REMOTE_SLEEP,
-       MCI_STATE_CONT_RSSI_POWER,
-       MCI_STATE_CONT_PRIORITY,
-       MCI_STATE_CONT_TXRX,
        MCI_STATE_RESET_REQ_WAKE,
        MCI_STATE_SEND_WLAN_COEX_VERSION,
        MCI_STATE_SEND_VERSION_QUERY,
index 156454892588cb8f51e84f16c4a4362a140b0e5c..e83d7200f762eff22895ede3d69a5f1118685b12 100644 (file)
@@ -517,23 +517,17 @@ void ath_mci_intr(struct ath_softc *sc)
                        mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
 
                if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
-                       int value_dbm = ar9003_mci_state(ah,
-                                                MCI_STATE_CONT_RSSI_POWER);
+                       int value_dbm = MS(mci_hw->cont_status,
+                                          AR_MCI_CONT_RSSI_POWER);
 
                        mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
 
-                       if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX))
-                               ath_dbg(common, MCI,
-                                       "MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
-                                       ar9003_mci_state(ah,
-                                                MCI_STATE_CONT_PRIORITY),
-                                       value_dbm);
-                       else
-                               ath_dbg(common, MCI,
-                                       "MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
-                                       ar9003_mci_state(ah,
-                                                MCI_STATE_CONT_PRIORITY),
-                                       value_dbm);
+                       ath_dbg(common, MCI,
+                               "MCI CONT_INFO: (%s) pri = %d pwr = %d dBm\n",
+                               MS(mci_hw->cont_status, AR_MCI_CONT_TXRX) ?
+                               "tx" : "rx",
+                               MS(mci_hw->cont_status, AR_MCI_CONT_PRIORITY),
+                               value_dbm);
                }
 
                if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK)
index 560d6effac7a1473139fb3cc09633a17109f149f..75acefbd4937824f5e91a8a3c96cb357e5ddc294 100644 (file)
@@ -2098,8 +2098,8 @@ enum {
 #define AR_MCI_CONT_STATUS                     0x1848
 #define AR_MCI_CONT_RSSI_POWER                 0x000000FF
 #define AR_MCI_CONT_RSSI_POWER_S               0
-#define AR_MCI_CONT_RRIORITY                   0x0000FF00
-#define AR_MCI_CONT_RRIORITY_S                 8
+#define AR_MCI_CONT_PRIORITY                   0x0000FF00
+#define AR_MCI_CONT_PRIORITY_S                 8
 #define AR_MCI_CONT_TXRX                       0x00010000
 #define AR_MCI_CONT_TXRX_S                     16