/* HWAGC disable */
exynos_ufs_set_hwacg_control(ufs, false);
} else {
- pm_qos_update_request(&ufs->pm_qos_int, 0);
+ //pm_qos_update_request(&ufs->pm_qos_int, 0);
// pm_qos_update_request(&ufs->pm_qos_fsys0, 0);
/*
*/
ret = ufs_pre_h8_exit(ufs);
- pm_qos_update_request(&ufs->pm_qos_int, ufs->pm_qos_int_value);
+ //pm_qos_update_request(&ufs->pm_qos_int, ufs->pm_qos_int_value);
// pm_qos_update_request(&ufs->pm_qos_fsys0, ufs->pm_qos_fsys0_value);
} else {
{
struct exynos_ufs *ufs = to_exynos_ufs(hba);
- pm_qos_update_request(&ufs->pm_qos_int, 0);
+ //pm_qos_update_request(&ufs->pm_qos_int, 0);
// pm_qos_update_request(&ufs->pm_qos_fsys0, 0);
exynos_ufs_dev_reset_ctrl(ufs, false);
dev->platform_data = ufs;
dev->dma_mask = &exynos_ufs_dma_mask;
-
- pm_qos_add_request(&ufs->pm_qos_int, PM_QOS_DEVICE_THROUGHPUT, 0);
+// pm_qos_add_request(&ufs->pm_qos_int, PM_QOS_DEVICE_THROUGHPUT, 0);
// pm_qos_add_request(&ufs->pm_qos_fsys0, PM_QOS_FSYS0_THROUGHPUT, 0);
if (ufs->tcxo_ex_ctrl)
spin_lock_init(&fsys0_tcxo_lock);
ufshcd_pltfrm_exit(pdev);
- pm_qos_remove_request(&ufs->pm_qos_fsys0);
+// pm_qos_remove_request(&ufs->pm_qos_fsys0);
+// pm_qos_remove_request(&ufs->pm_qos_int);
ufs->misc_flags = EXYNOS_UFS_MISC_TOGGLE_LOG;