drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling
authorChristian König <christian.koenig@amd.com>
Wed, 13 May 2015 12:21:06 +0000 (14:21 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 4 Jun 2015 01:03:42 +0000 (21:03 -0400)
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

index b9b1df6bdaa464b258e7558bac0fd5306f79fde1..ab096723a588712f3f58b861f265c9149e632b2a 100644 (file)
@@ -485,7 +485,7 @@ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
        WREG32(mmVM_L2_CNTL3, tmp);
        /* setup context0 */
        WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);
-       WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->mc.gtt_end >> 12);
+       WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, (adev->mc.gtt_end >> 12) - 1);
        WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);
        WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
                        (u32)(adev->dummy_page.addr >> 12));
@@ -506,7 +506,7 @@ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
         */
        /* set vm size, must be a multiple of 4 */
        WREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
-       WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn);
+       WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1);
        for (i = 1; i < 16; i++) {
                if (i < 8)
                        WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i,
index 7f6c52ff832f6353185c90bcc23007fe72ea68b3..f816165acd70f32c6258c70d816a1abea8d8e099 100644 (file)
@@ -589,7 +589,7 @@ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev)
        WREG32(mmVM_L2_CNTL4, tmp);
        /* setup context0 */
        WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);
-       WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->mc.gtt_end >> 12);
+       WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, (adev->mc.gtt_end >> 12) - 1);
        WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);
        WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
                        (u32)(adev->dummy_page.addr >> 12));
@@ -610,7 +610,7 @@ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev)
         */
        /* set vm size, must be a multiple of 4 */
        WREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
-       WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn);
+       WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1);
        for (i = 1; i < 16; i++) {
                if (i < 8)
                        WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i,