sh: Have SH-5 provide an {en,dis}able_fpu() impl.
authorPaul Mundt <lethal@linux-sh.org>
Sat, 10 Nov 2007 11:27:03 +0000 (20:27 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Mon, 28 Jan 2008 04:18:44 +0000 (13:18 +0900)
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/kernel/ptrace_64.c
arch/sh/kernel/traps_64.c
include/asm-sh/processor_64.h

index 8a2d339cf760b3df148e12bec2475e2b5c454b05..14e7d5e5679a28bcb60424a2f4b3822666b6ec36 100644 (file)
@@ -74,9 +74,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
        }
 
        if (last_task_used_math == task) {
-               grab_fpu();
+               enable_fpu();
                fpsave(&task->thread.fpu.hard);
-               release_fpu();
+               disable_fpu();
                last_task_used_math = 0;
                regs->sr |= SR_FD;
        }
@@ -110,9 +110,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
                fpinit(&task->thread.fpu.hard);
                set_stopped_child_used_math(task);
        } else if (last_task_used_math == task) {
-               grab_fpu();
+               enable_fpu();
                fpsave(&task->thread.fpu.hard);
-               release_fpu();
+               disable_fpu();
                last_task_used_math = 0;
                regs->sr |= SR_FD;
        }
index 742ce18b682063a0e632df96c00f8f40e0726d06..0f4ea3ac3e0bec4125e75a8cae317f654c6d73ba 100644 (file)
@@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                   context switch the registers into memory so they can be
                   indexed by register number. */
                if (last_task_used_math == current) {
-                       grab_fpu();
+                       enable_fpu();
                        fpsave(&current->thread.fpu.hard);
-                       release_fpu();
+                       disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
                }
@@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                   context switch the registers into memory so they can be
                   indexed by register number. */
                if (last_task_used_math == current) {
-                       grab_fpu();
+                       enable_fpu();
                        fpsave(&current->thread.fpu.hard);
-                       release_fpu();
+                       disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
                }
index ecd6b403f7db62c5f13ad20249205c302dd2792d..312fd73fb87e9fcf13d2242623a293b925473743 100644 (file)
@@ -18,6 +18,7 @@
 #include <asm/page.h>
 #include <asm/types.h>
 #include <asm/cache.h>
+#include <asm/ptrace.h>
 #include <asm/cpu/registers.h>
 
 /*
@@ -218,7 +219,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
  * FPU lazy state save handling.
  */
 
-static inline void release_fpu(void)
+static inline void disable_fpu(void)
 {
        unsigned long long __dummy;
 
@@ -230,7 +231,7 @@ static inline void release_fpu(void)
                             : "r" (SR_FD));
 }
 
-static inline void grab_fpu(void)
+static inline void enable_fpu(void)
 {
        unsigned long long __dummy;
 
@@ -242,6 +243,16 @@ static inline void grab_fpu(void)
                             : "r" (~SR_FD));
 }
 
+static inline void release_fpu(struct pt_regs *regs)
+{
+       regs->sr |= SR_FD;
+}
+
+static inline void grab_fpu(struct pt_regs *regs)
+{
+       regs->sr &= ~SR_FD;
+}
+
 /* Round to nearest, no exceptions on inexact, overflow, underflow,
    zero-divide, invalid.  Configure option for whether to flush denorms to
    zero, or except if a denorm is encountered.  */