x86: PAT: add pgprot_writecombine() interface for drivers - v3
authorvenkatesh.pallipadi@intel.com <venkatesh.pallipadi@intel.com>
Thu, 18 Dec 2008 19:41:32 +0000 (11:41 -0800)
committerH. Peter Anvin <hpa@zytor.com>
Thu, 18 Dec 2008 21:30:16 +0000 (13:30 -0800)
Impact: New mm functionality.

Add pgprot_writecombine. pgprot_writecombine will be aliased to
pgprot_noncached when not supported by the architecture.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/include/asm/pgtable.h
arch/x86/mm/pat.c
include/asm-generic/pgtable.h

index 6968d4f6be3e138c6d35d0107753429fcd4135e7..579f8ceee9485cc5d518398f78e48d48ed60eddc 100644 (file)
 
 #ifndef __ASSEMBLY__
 
+#define pgprot_writecombine    pgprot_writecombine
+extern pgprot_t pgprot_writecombine(pgprot_t prot);
+
 /*
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
index 1069ffecf77d87fdc933adaef150603725bd04f8..d5254bae84f4907e7ea5af706cde0e72647d63a7 100644 (file)
@@ -832,6 +832,14 @@ void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
        }
 }
 
+pgprot_t pgprot_writecombine(pgprot_t prot)
+{
+       if (pat_enabled)
+               return __pgprot(pgprot_val(prot) | _PAGE_CACHE_WC);
+       else
+               return pgprot_noncached(prot);
+}
+
 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
 
 /* get Nth element of the linked list */
index ef87f889ef62c2e215b22a0b4d29a53d3b8f61fe..b84633801fb6775bcb84039599f54212e5b73b7b 100644 (file)
@@ -129,6 +129,10 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres
 #define move_pte(pte, prot, old_addr, new_addr)        (pte)
 #endif
 
+#ifndef pgprot_writecombine
+#define pgprot_writecombine pgprot_noncached
+#endif
+
 /*
  * When walking page tables, get the address of the next boundary,
  * or the end address of the range if that comes earlier.  Although no