crypto: chcr - Pass lcb bit setting to firmware
authorHarsh Jain <harsh@chelsio.com>
Thu, 15 Jun 2017 07:13:39 +0000 (12:43 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Tue, 20 Jun 2017 03:21:33 +0000 (11:21 +0800)
GCM and CBC mode of operation requires Last Cipher Block.
This patch set lcb bit in WR header when required.

Signed-off-by: Harsh Jain <harsh@chelsio.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/chelsio/chcr_algo.c
drivers/crypto/chelsio/chcr_algo.h

index f00e0d8bd03983d308536069cffc02f7458921e3..e8ff505c3beb4d02cba2dec10e89629b99a307a7 100644 (file)
@@ -518,7 +518,8 @@ static inline void create_wreq(struct chcr_context *ctx,
                               void *req, struct sk_buff *skb,
                               int kctx_len, int hash_sz,
                               int is_iv,
-                              unsigned int sc_len)
+                              unsigned int sc_len,
+                              unsigned int lcb)
 {
        struct uld_ctx *u_ctx = ULD_CTX(ctx);
        int iv_loc = IV_DSGL;
@@ -543,7 +544,8 @@ static inline void create_wreq(struct chcr_context *ctx,
        chcr_req->wreq.cookie = cpu_to_be64((uintptr_t)req);
        chcr_req->wreq.rx_chid_to_rx_q_id =
                FILL_WR_RX_Q_ID(ctx->dev->rx_channel_id, qid,
-                               is_iv ? iv_loc : IV_NOP, ctx->tx_qidx);
+                               is_iv ? iv_loc : IV_NOP, !!lcb,
+                               ctx->tx_qidx);
 
        chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id,
                                                       qid);
@@ -652,7 +654,8 @@ static struct sk_buff
        write_buffer_to_skb(skb, &frags, reqctx->iv, ivsize);
        write_sg_to_skb(skb, &frags, req->src, req->nbytes);
        create_wreq(ctx, chcr_req, req, skb, kctx_len, 0, 1,
-                       sizeof(struct cpl_rx_phys_dsgl) + phys_dsgl);
+                       sizeof(struct cpl_rx_phys_dsgl) + phys_dsgl,
+                       ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC);
        reqctx->skb = skb;
        skb_get(skb);
        return skb;
@@ -923,7 +926,7 @@ static struct sk_buff *create_hash_wr(struct ahash_request *req,
                write_sg_to_skb(skb, &frags, req->src, param->sg_len);
 
        create_wreq(ctx, chcr_req, req, skb, kctx_len, hash_size_in_response, 0,
-                       DUMMY_BYTES);
+                       DUMMY_BYTES, 0);
        req_ctx->skb = skb;
        skb_get(skb);
        return skb;
@@ -1508,7 +1511,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req,
        write_buffer_to_skb(skb, &frags, req->iv, ivsize);
        write_sg_to_skb(skb, &frags, src, req->cryptlen);
        create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1,
-                  sizeof(struct cpl_rx_phys_dsgl) + dst_size);
+                  sizeof(struct cpl_rx_phys_dsgl) + dst_size, 0);
        reqctx->skb = skb;
        skb_get(skb);
 
@@ -1804,7 +1807,7 @@ static struct sk_buff *create_aead_ccm_wr(struct aead_request *req,
        skb_set_transport_header(skb, transhdr_len);
        frags = fill_aead_req_fields(skb, req, src, ivsize, aeadctx);
        create_wreq(ctx, chcr_req, req, skb, kctx_len, 0, 1,
-                   sizeof(struct cpl_rx_phys_dsgl) + dst_size);
+                   sizeof(struct cpl_rx_phys_dsgl) + dst_size, 0);
        reqctx->skb = skb;
        skb_get(skb);
        return skb;
@@ -1950,7 +1953,8 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req,
        write_buffer_to_skb(skb, &frags, reqctx->iv, ivsize);
        write_sg_to_skb(skb, &frags, src, req->cryptlen);
        create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1,
-                       sizeof(struct cpl_rx_phys_dsgl) + dst_size);
+                       sizeof(struct cpl_rx_phys_dsgl) + dst_size,
+                       reqctx->verify);
        reqctx->skb = skb;
        skb_get(skb);
        return skb;
index 751d06a5810184582a1bd3be7d9c8e92935b48b4..9894c7b4d76494b0b69cc1524ed99bbce146175d 100644 (file)
                        FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_V(1) | \
                        FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_V((ctx_len)))
 
-#define FILL_WR_RX_Q_ID(cid, qid, wr_iv, fid) \
+#define FILL_WR_RX_Q_ID(cid, qid, wr_iv, lcb, fid) \
                htonl( \
                        FW_CRYPTO_LOOKASIDE_WR_RX_CHID_V((cid)) | \
                        FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_V((qid)) | \
-                       FW_CRYPTO_LOOKASIDE_WR_LCB_V(0) | \
+                       FW_CRYPTO_LOOKASIDE_WR_LCB_V((lcb)) | \
                        FW_CRYPTO_LOOKASIDE_WR_IV_V((wr_iv)) | \
                        FW_CRYPTO_LOOKASIDE_WR_FQIDX_V(fid))