scsi: megaraid_sas: 128 MSIX Support
authorSasikumar Chandrasekaran <sasikumar.pc@broadcom.com>
Tue, 10 Jan 2017 23:20:44 +0000 (18:20 -0500)
committerMartin K. Petersen <martin.petersen@oracle.com>
Wed, 11 Jan 2017 04:15:45 +0000 (23:15 -0500)
SAS3.5 Generic Megaraid based Controllers will have the support for 128 MSI-X vectors,
resulting in the need to support 128 reply queues

Signed-off-by: Sasikumar Chandrasekaran <sasikumar.pc@broadcom.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/megaraid/megaraid_sas.h
drivers/scsi/megaraid/megaraid_sas_base.c
drivers/scsi/megaraid/megaraid_sas_fusion.c

index cb82195a8be1e06bbd55cb2041b77bc999c991ba..36aac88571fc309802b6361a9577202e1b2b0d87 100644 (file)
@@ -2148,6 +2148,7 @@ struct megasas_instance {
        bool dev_handle;
        bool fw_sync_cache_support;
        bool is_ventura;
+       bool msix_combined;
 };
 struct MR_LD_VF_MAP {
        u32 size;
index e00b3dece088e6a293fc3b656c8ef9aaa04ce431..6801a449d236814b5872ec612e8fc3658e30f76b 100644 (file)
@@ -5072,13 +5072,7 @@ static int megasas_init_fw(struct megasas_instance *instance)
                        goto fail_ready_state;
        }
 
-       /*
-        * MSI-X host index 0 is common for all adapter.
-        * It is used for all MPT based Adapters.
-        */
-       instance->reply_post_host_index_addr[0] =
-               (u32 __iomem *)((u8 __iomem *)instance->reg_set +
-               MPI2_REPLY_POST_HOST_INDEX_OFFSET);
+
 
        /* Check if MSI-X is supported while in ready state */
        msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
@@ -5098,6 +5092,9 @@ static int megasas_init_fw(struct megasas_instance *instance)
                                instance->msix_vectors = ((scratch_pad_2
                                        & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
                                        >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
+                               if (instance->msix_vectors > 16)
+                                       instance->msix_combined = true;
+
                                if (rdpq_enable)
                                        instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
                                                                1 : 0;
@@ -5131,6 +5128,20 @@ static int megasas_init_fw(struct megasas_instance *instance)
                else
                        instance->msix_vectors = 0;
        }
+       /*
+        * MSI-X host index 0 is common for all adapter.
+        * It is used for all MPT based Adapters.
+        */
+       if (instance->msix_combined) {
+               instance->reply_post_host_index_addr[0] =
+                               (u32 *)((u8 *)instance->reg_set +
+                               MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET);
+       } else {
+               instance->reply_post_host_index_addr[0] =
+                       (u32 *)((u8 *)instance->reg_set +
+                       MPI2_REPLY_POST_HOST_INDEX_OFFSET);
+       }
+
        i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
        if (i < 0)
                goto fail_setup_irqs;
index 8d7a397825120d9bc4ed8af55196b328e0d916bc..413e203088717fea4dc24df6d7865777b67fd8c6 100644 (file)
@@ -2391,7 +2391,7 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
                 * pending to be completed
                 */
                if (threshold_reply_count >= THRESHOLD_REPLY_COUNT) {
-                       if (fusion->adapter_type == INVADER_SERIES)
+                       if (instance->msix_combined)
                                writel(((MSIxIndex & 0x7) << 24) |
                                        fusion->last_reply_idx[MSIxIndex],
                                        instance->reply_post_host_index_addr[MSIxIndex/8]);
@@ -2407,7 +2407,7 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
                return IRQ_NONE;
 
        wmb();
-       if (fusion->adapter_type == INVADER_SERIES)
+       if (instance->msix_combined)
                writel(((MSIxIndex & 0x7) << 24) |
                        fusion->last_reply_idx[MSIxIndex],
                        instance->reply_post_host_index_addr[MSIxIndex/8]);