ARM: dts: dra7: Enable eDMA
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Mon, 7 Mar 2016 15:17:29 +0000 (17:17 +0200)
committerTony Lindgren <tony@atomide.com>
Mon, 11 Apr 2016 19:48:00 +0000 (12:48 -0700)
DRA7 family has eDMA available along with the sDMA and in some cases it is
better suited for servicing peripherals.

Add the needed nodes for eDMA to be usable:
edma-tpcc, edma-tptc0/1 and the edma-xbar.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7.dtsi

index 035f9be26337f6044134bce4d94e7c8b46556ed2..1d54d311c46a9aee971a09f8e3e43a2fb84836bb 100644 (file)
                                        ti,dma-safe-map = <0>;
                                        dma-masters = <&sdma>;
                                };
+
+                               edma_xbar: dma-router@c78 {
+                                       compatible = "ti,dra7-dma-crossbar";
+                                       reg = <0xc78 0x7c>;
+                                       #dma-cells = <2>;
+                                       dma-requests = <204>;
+                                       ti,dma-safe-map = <0>;
+                                       dma-masters = <&edma>;
+                               };
                        };
 
                        cm_core_aon: cm_core_aon@5000 {
                        dma-requests = <127>;
                };
 
+               edma: edma@43300000 {
+                       compatible = "ti,edma3-tpcc";
+                       ti,hwmods = "tpcc";
+                       reg = <0x43300000 0x100000>;
+                       reg-names = "edma3_cc";
+                       interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_ccint", "emda3_mperr",
+                                         "edma3_ccerrint";
+                       dma-requests = <64>;
+                       #dma-cells = <2>;
+
+                       ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;
+
+                       /*
+                        * memcpy is disabled, can be enabled with:
+                        * ti,edma-memcpy-channels = <20 21>;
+                        * for example. Note that these channels need to be
+                        * masked in the xbar as well.
+                        */
+               };
+
+               edma_tptc0: tptc@43400000 {
+                       compatible = "ti,edma3-tptc";
+                       ti,hwmods = "tptc0";
+                       reg =   <0x43400000 0x100000>;
+                       interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_tcerrint";
+               };
+
+               edma_tptc1: tptc@43500000 {
+                       compatible = "ti,edma3-tptc";
+                       ti,hwmods = "tptc1";
+                       reg =   <0x43500000 0x100000>;
+                       interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_tcerrint";
+               };
+
                gpio1: gpio@4ae10000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4ae10000 0x200>;