mfd: arizona: Fully support the use of MCLK1 as the 32kHz clock source
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 19 Mar 2013 13:47:47 +0000 (14:47 +0100)
committerSamuel Ortiz <sameo@linux.intel.com>
Mon, 8 Apr 2013 13:20:59 +0000 (15:20 +0200)
MCLK1 is not in the AoD power domain so if it is used as the 32kHz clock
source we need to hold a runtime PM reference to keep the device from going
into low power mode.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/arizona-core.c

index dd679e8601daf5d254a0a692406c441b6e0b98ff..c2c96939129130903c74561088d0644e5a394ff1 100644 (file)
@@ -39,11 +39,21 @@ int arizona_clk32k_enable(struct arizona *arizona)
 
        arizona->clk32k_ref++;
 
-       if (arizona->clk32k_ref == 1)
+       if (arizona->clk32k_ref == 1) {
+               switch (arizona->pdata.clk32k_src) {
+               case ARIZONA_32KZ_MCLK1:
+                       ret = pm_runtime_get_sync(arizona->dev);
+                       if (ret != 0)
+                               goto out;
+                       break;
+               }
+
                ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
                                         ARIZONA_CLK_32K_ENA,
                                         ARIZONA_CLK_32K_ENA);
+       }
 
+out:
        if (ret != 0)
                arizona->clk32k_ref--;
 
@@ -63,10 +73,17 @@ int arizona_clk32k_disable(struct arizona *arizona)
 
        arizona->clk32k_ref--;
 
-       if (arizona->clk32k_ref == 0)
+       if (arizona->clk32k_ref == 0) {
                regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
                                   ARIZONA_CLK_32K_ENA, 0);
 
+               switch (arizona->pdata.clk32k_src) {
+               case ARIZONA_32KZ_MCLK1:
+                       pm_runtime_put_sync(arizona->dev);
+                       break;
+               }
+       }
+
        mutex_unlock(&arizona->clk_lock);
 
        return ret;