Merge branches 'at91', 'ep93xx', 'errata', 'footbridge', 'fncpy', 'gemini', 'irqdata...

diff --cc arch/arm/Kconfig
index 26d45e5b636b7fcfcf4501a78347e0192a5f9429,5cff165b7eb04ef092e09957cf05cf6b8eddfcee,d3f2de37a4b7c2305757c768b4cf46ba1dcc2bb7,6d9fbfe32a2dbb746a8092802ca24cf4daa3870a,5cff165b7eb04ef092e09957cf05cf6b8eddfcee,5cff165b7eb04ef092e09957cf05cf6b8eddfcee,26d45e5b636b7fcfcf4501a78347e0192a5f9429,5cff165b7eb04ef092e09957cf05cf6b8eddfcee,2d0a1dc15994bfb8e3de0641934c89ce11fcd2bb,166efa2a19cd96eb05ad5b4b599708c9a68c1d70,166efa2a19cd96eb05ad5b4b599708c9a68c1d70,cab466fc5ae6fe31a549f155e097969b6ff3ccfa..38bf684448e72b41295c662ef617fb02e9acea97
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
--- 3/arch/arm/Kconfig
--- 4/arch/arm/Kconfig
--- 5/arch/arm/Kconfig
--- 6/arch/arm/Kconfig
--- 7/arch/arm/Kconfig
--- 8/arch/arm/Kconfig
--- 9/arch/arm/Kconfig
--- 10/arch/arm/Kconfig
--- 11/arch/arm/Kconfig
--- 12/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@@@@@@@@@@@ -1177,6 -1177,6 -1177,53 -1177,6 -1177,6 -1177,6 -1177,6 -1177,6 -1177,6 -1177,31 -1177,31 -1189,6 +1189,53 @@@@@@@@@@@@@ config ARM_ERRATA_74362
                  visible impact on the overall performance or power consumption of the
                  processor.
            
++ ++++++  +config ARM_ERRATA_751472
++ ++++++  +    bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
++ ++++++  +    depends on CPU_V7 && SMP
++ ++++++  +    help
++ ++++++  +      This option enables the workaround for the 751472 Cortex-A9 (prior
++ ++++++  +      to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
++ ++++++  +      completion of a following broadcasted operation if the second
++ ++++++  +      operation is received by a CPU before the ICIALLUIS has completed,
++ ++++++  +      potentially leading to corrupted entries in the cache or TLB.
++ ++++++  +
++ ++++++  +config ARM_ERRATA_753970
++ ++++++  +    bool "ARM errata: cache sync operation may be faulty"
++ ++++++  +    depends on CACHE_PL310
++ ++++++  +    help
++ ++++++  +      This option enables the workaround for the 753970 PL310 (r3p0) erratum.
++ ++++++  +
++ ++++++  +      Under some condition the effect of cache sync operation on
++ ++++++  +      the store buffer still remains when the operation completes.
++ ++++++  +      This means that the store buffer is always asked to drain and
++ ++++++  +      this prevents it from merging any further writes. The workaround
++ ++++++  +      is to replace the normal offset of cache sync operation (0x730)
++ ++++++  +      by another offset targeting an unmapped PL310 register 0x740.
++ ++++++  +      This has the same effect as the cache sync operation: store buffer
++ ++++++  +      drain and waiting for all buffers empty.
++ ++++++  +
++ +++++++++config ARM_ERRATA_754322
++ +++++++++    bool "ARM errata: possible faulty MMU translations following an ASID switch"
++ +++++++++    depends on CPU_V7
++ +++++++++    help
++ +++++++++      This option enables the workaround for the 754322 Cortex-A9 (r2p*,
++ +++++++++      r3p*) erratum. A speculative memory access may cause a page table walk
++ +++++++++      which starts prior to an ASID switch but completes afterwards. This
++ +++++++++      can populate the micro-TLB with a stale entry which may be hit with
++ +++++++++      the new ASID. This workaround places two dsb instructions in the mm
++ +++++++++      switching code so that no page table walks can cross the ASID switch.
++ +++++++++
++ +++++++++config ARM_ERRATA_754327
++ +++++++++    bool "ARM errata: no automatic Store Buffer drain"
++ +++++++++    depends on CPU_V7 && SMP
++ +++++++++    help
++ +++++++++      This option enables the workaround for the 754327 Cortex-A9 (prior to
++ +++++++++      r2p0) erratum. The Store Buffer does not have any automatic draining
++ +++++++++      mechanism and therefore a livelock may occur if an external agent
++ +++++++++      continuously polls a memory location waiting to observe an update.
++ +++++++++      This workaround defines cpu_relax() as smp_mb(), preventing correctly
++ +++++++++      written polling loops from denying visibility of updates to memory.
++ +++++++++
            endmenu
            
            source "arch/arm/common/Kconfig"

diff --cc arch/arm/Makefile
Simple merge

diff --cc arch/arm/boot/compressed/Makefile
Simple merge

diff --cc arch/arm/mach-pxa/pm.c
Simple merge

diff --cc arch/arm/mach-pxa/pxa25x.c
Simple merge

diff --cc arch/arm/mm/proc-v7.S
Simple merge

diff --cc arch/arm/plat-samsung/include/plat/pm.h
Simple merge