drm/radeon: don't reset the MC on IGPs/APUs

The MC isn't part of the GPU per se.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 045955d5f3372ebd8a705541e43cf78d423e0b66..2916de896a60e5e149d140cb5364a7b9529e363c 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2500,8 +2500,10 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
        if (reset_mask & RADEON_RESET_VMC)
                srbm_soft_reset |= SOFT_RESET_VMC;
 
-       if (reset_mask & RADEON_RESET_MC)
-               srbm_soft_reset |= SOFT_RESET_MC;
+       if (!(rdev->flags & RADEON_IS_IGP)) {
+               if (reset_mask & RADEON_RESET_MC)
+                       srbm_soft_reset |= SOFT_RESET_MC;
+       }
 
        if (grbm_soft_reset) {
                tmp = RREG32(GRBM_SOFT_RESET);

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index b6e80550ed9095f6748fafda184c56d1fbeae8bf..170bd03d4dd8d4c45fa2406ccd3a7471bd85253a 100644 (file)
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1474,8 +1474,10 @@ static void cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
        if (reset_mask & RADEON_RESET_VMC)
                srbm_soft_reset |= SOFT_RESET_VMC;
 
-       if (reset_mask & RADEON_RESET_MC)
-               srbm_soft_reset |= SOFT_RESET_MC;
+       if (!(rdev->flags & RADEON_IS_IGP)) {
+               if (reset_mask & RADEON_RESET_MC)
+                       srbm_soft_reset |= SOFT_RESET_MC;
+       }
 
        if (grbm_soft_reset) {
                tmp = RREG32(GRBM_SOFT_RESET);

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 3f292765aea8fdfaa1d6c473bf2ea69c325769d6..dbcb0752f0835c944e90a05ba56ff095b978fe5f 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1475,8 +1475,10 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
        if (reset_mask & RADEON_RESET_GRBM)
                srbm_soft_reset |= S_000E60_SOFT_RESET_GRBM(1);
 
-       if (reset_mask & RADEON_RESET_MC)
-               srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
+       if (!(rdev->flags & RADEON_IS_IGP)) {
+               if (reset_mask & RADEON_RESET_MC)
+                       srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
+       }
 
        if (reset_mask & RADEON_RESET_VMC)
                srbm_soft_reset |= S_000E60_SOFT_RESET_VMC(1);