ARM64: dts: meson-gxbb-p201: fix ethernet support
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 19 Feb 2017 21:41:47 +0000 (22:41 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 6 Mar 2017 17:55:56 +0000 (09:55 -0800)
Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with
the reset GPIO being GPIOZ_14).
However our P201 board .dts simply inherits the phy-mode setting from
from meson-gx.dtsi where it defaults to RGMII mode.
Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only
specifies the RGMII pins which are only valid for the P200 board.
Instead we add the ethmac node to the meson-gxbb-p201.dts and configure
the pinctrl property and the phy-mode for an RMII PHY.

An MDIO node (which would also specify the PHY) is not added since we
don't know which PHY is being used (and thus which PHY address would
have to be used).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi

index 39bb037a3e475fec1e202aaaa10d1ce17900bc06..ae3194663d642709ac950b7826f22685936717a9 100644 (file)
        compatible = "amlogic,p201", "amlogic,meson-gxbb";
        model = "Amlogic Meson GXBB P201 Development Board";
 };
+
+&ethmac {
+       status = "okay";
+       pinctrl-0 = <&eth_rmii_pins>;
+       pinctrl-names = "default";
+       phy-mode = "rmii";
+
+       snps,reset-gpio = <&gpio GPIOZ_14 0>;
+       snps,reset-delays-us = <0 10000 1000000>;
+       snps,reset-active-low;
+};
index 4a96e0f6f9265b858287c039714e652062134c9e..17ebe46e48d43e101ddbaefb91c2322f709de33e 100644 (file)
        pinctrl-names = "default";
 };
 
-&ethmac {
-       status = "okay";
-       pinctrl-0 = <&eth_rgmii_pins>;
-       pinctrl-names = "default";
-};
-
 &ir {
        status = "okay";
        pinctrl-0 = <&remote_input_ao_pins>;