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powerpc/44x: Enable DYNAMIC_MEMSTART for 440x
authorSuzuki Poulose <suzuki@in.ibm.com>
Wed, 14 Dec 2011 22:57:57 +0000 (22:57 +0000)
committerJosh Boyer <jwboyer@gmail.com>
Tue, 20 Dec 2011 15:20:38 +0000 (10:20 -0500)
DYNAMIC_MEMSTART(old RELOCATABLE) was restricted only to PPC_47x variants
of 44x. This patch enables DYNAMIC_MEMSTART for 440x based chipsets.

Signed-off-by: Suzuki K. Poulose <suzuki@in.ibm.com>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux ppc dev <linuxppc-dev@lists.ozlabs.org>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
arch/powerpc/Kconfig patch | blob | blame | history
arch/powerpc/kernel/head_44x.S patch | blob | blame | history

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 6c84756923220558db1bb3ed265c7b2b6a8dd182..8b323b7b0a611bcb82323bd153018f356ab9e372 100644 (file)
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -833,7 +833,7 @@ config LOWMEM_CAM_NUM
 
 config DYNAMIC_MEMSTART
        bool "Enable page aligned dynamic load address for kernel (EXPERIMENTAL)"
-       depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || PPC_47x)
+       depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || 44x)
        select NONSTATIC_KERNEL
        help
          This option enables the kernel to be loaded at any page aligned
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index d7a1debda10b6471359d76965ab3451ea8a4cd32..0878bf5d8a68c98476cff2eebdc79894b4865834 100644 (file)
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -804,12 +804,24 @@ skpinv:   addi    r4,r4,1                         /* Increment */
 /*
  * Configure and load pinned entry into TLB slot 63.
  */
+#ifdef CONFIG_DYNAMIC_MEMSTART
+
+       /* Read the XLAT entry for our current mapping */
+       tlbre   r25,r23,PPC44x_TLB_XLAT
+
+       lis     r3,KERNELBASE@h
+       ori     r3,r3,KERNELBASE@l
+
+       /* Use our current RPN entry */
+       mr      r4,r25
+#else
 
        lis     r3,PAGE_OFFSET@h
        ori     r3,r3,PAGE_OFFSET@l
 
        /* Kernel is at the base of RAM */
        li r4, 0                        /* Load the kernel physical address */
+#endif
 
        /* Load the kernel PID = 0 */
        li      r0,0