ARM: at91/dt: sama5d4: add the macb1 node

The second macb is present on all the sama5d4 SoCs. Let's add a node
reflecting it in the device tree.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 4e67a27513244751ac28b8d3faa90f4a4756e137..15bbaf690047dfb9ab0082d31b83142b63228e09 100644 (file)
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1189,6 +1189,19 @@
                                clock-names = "t0_clk", "slow_clk";
                        };
 
+                       macb1: ethernet@fc028000 {
+                               compatible = "atmel,sama5d4-gem";
+                               reg = <0xfc028000 0x100>;
+                               interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_macb1_rmii>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&macb1_clk>, <&macb1_clk>;
+                               clock-names = "hclk", "pclk";
+                               status = "disabled";
+                       };
+
                        adc0: adc@fc034000 {
                                compatible = "atmel,at91sam9x5-adc";
                                reg = <0xfc034000 0x100>;
@@ -1635,6 +1648,23 @@
                                        };
                                };
 
+                               macb1 {
+                                       pinctrl_macb1_rmii: macb1_rmii-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX0 */
+                                                        AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX1 */
+                                                        AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX0 */
+                                                        AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX1 */
+                                                        AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXDV */
+                                                        AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXER */
+                                                        AT91_PIOA  4 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXEN */
+                                                        AT91_PIOA  2 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXCK */
+                                                        AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDC */
+                                                        AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDIO */
+                                                       >;
+                                       };
+                               };
+
                                mmc0 {
                                        pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
                                                atmel,pins =