ARM: 9071/1: uprobes: Don't hook on thumb instructions

commit d2f7eca60b29006285d57c7035539e33300e89e5 upstream.

Since uprobes is not supported for thumb, check that the thumb bit is
not set when matching the uprobes instruction hooks.

The Arm UDF instructions used for uprobes triggering
(UPROBE_SWBP_ARM_INSN and UPROBE_SS_ARM_INSN) coincidentally share the
same encoding as a pair of unallocated 32-bit thumb instructions (not
UDF) when the condition code is 0b1111 (0xf). This in effect makes it
possible to trigger the uprobes functionality from thumb, and at that
using two unallocated instructions which are not permanently undefined.

Signed-off-by: Fredrik Strupe <fredrik@strupe.net>
Cc: stable@vger.kernel.org
Fixes: c7edc9e326d5 ("ARM: add uprobes support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm/probes/uprobes/core.c b/arch/arm/probes/uprobes/core.c
index d1329f1ba4e4c322059604f6d81f51585eed00d0..b97230704b744883b7c470131477714f80b7e1bb 100644 (file)
--- a/arch/arm/probes/uprobes/core.c
+++ b/arch/arm/probes/uprobes/core.c
@@ -207,7 +207,7 @@ unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
 static struct undef_hook uprobes_arm_break_hook = {
        .instr_mask     = 0x0fffffff,
        .instr_val      = (UPROBE_SWBP_ARM_INSN & 0x0fffffff),
-       .cpsr_mask      = MODE_MASK,
+       .cpsr_mask      = (PSR_T_BIT | MODE_MASK),
        .cpsr_val       = USR_MODE,
        .fn             = uprobe_trap_handler,
 };
@@ -215,7 +215,7 @@ static struct undef_hook uprobes_arm_break_hook = {
 static struct undef_hook uprobes_arm_ss_hook = {
        .instr_mask     = 0x0fffffff,
        .instr_val      = (UPROBE_SS_ARM_INSN & 0x0fffffff),
-       .cpsr_mask      = MODE_MASK,
+       .cpsr_mask      = (PSR_T_BIT | MODE_MASK),
        .cpsr_val       = USR_MODE,
        .fn             = uprobe_trap_handler,
 };